— 104 —
1
2
3
4
8
7
6
5
VCC
1Y
2B
2A
GND
2Y
1B
1A
Y DECODER
X DECODER
OE ,CE AND WE
LOGIC
OE
CE
WE
NC
AO
A1
A2
A3
A4
A5
NC
A6
A7
A8
GND
A9
A10
A11
NC
A12
A13
A14
A15
NC
VCC
NC
NC
D15
D14
D13
D12
D11
NC
D10
D9
D8
GND
D7
D6
D5
NC
D4
D3
D2
D1
D0
NC
NC
ADDRESS INPUTS
CELL MATRIX
INPUT / OUTPUT BUFFERS
DATA LATCH
Y-GATING
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
46
46
26
25
1
2
3
4
OUT1
VM
VCC
FIN
8
7
6
5
GND
OUT2
VREF
RIN
CONTROL LOGIC
TSD
POWER
SAVE
DRIVER
DRIVER
DATA
BCK
LRCK
XRES
XWR
XRD
XCS
GND
D0
NC
D1
D2
D3
A0
A1
VDD
ABSOLUTE
BLOCK
16 BIT
A
COMP
B
0 DB
OVER
CONTROL
BLOCK
MAX REG
MAX REG
MPX
READ WRITE LOGIC
0 DB
0 DB
0 DB
OVER COUNTER
OVER COUNTER
LATCH
L , R
CONTROL
OUT REG
16 BIT
DATA
BUS
16 BIT
(INTERACTIVE)
LATCH
&
OVER
REG
DETECTER
LATCH
BUFFER
1
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
1
2
3
4
5
VCC
Cd
RESET
INT
GND
+
–
+
–
RESET
SIGNAL
GENERATOR
INTERRUPT
SIGNAL
GENERATOR
IC310 M62005FP
IC311, 314 TC7W08FU
IC309 BA6287F-T1
IC302 AT29C1024-70
IC305 MSM6338MS-K
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