— 86 —
48, 49
50
51
52 to 55
56 to 60
61
62
63
64
65
66
67
68, 69
70, 71
72 to 74
75
76
77
78
79
80
81
82
82
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
A11, A10
VSS
VDD
A03 to A00
A04 to A08
XOE
XCAS
VSS
XCS
A09
XRAS
XWE
D1, D0
D2, D3
D4 to D6
VSS
D7
ERR
EXTC2R
BUSY
EMP
FUL
EQL
MDLK
CPSY
CTMD0
CTMD1
SPO
VSS
MDSY
LRCK
BCK
C2PO
DATA
DIDT
DODT
DIRCPB
MIN
SPOSL
MCK
VSS
O
—
—
O
O
O
O
—
O
O
O
O
I/O
I/O
I/O
—
I/O
I/O
I
O
O
O
O
O
O
O
O
O
—
O
I
I
I
I
I
O
O
I
I
O
—
ªOutput of address signal to RAM (IC402)
Ground
Power supply (+5V)
Output of address signal to RAM (IC402)
Output of address signal to RAM (IC402)
Output of output enable control signal to RAM (IC402)
Output of column address strobe signal to RAM (IC402)
Ground
Output of chip select signal to RAM (IC402) (Not used)
Output of address signal to RAM (IC402)
Output of row address strobe signal to RAM (IC402)
Output of read/write control signal to RAM (IC402)
Input/output of data signal to/from RAM (IC402)
Data signal input/output (Not used)
Ground
Data signal input/output (Not used)
Input/output of error (C2PO) data to external RAM (Not used)
External RAM selection input for error data writing (“H”: External RAM) (Fixed at “L”)
RAM access BUSY signal output (Not used)
EMPTY or immediately before FULL of ATRAC data (When DSC=ASC+1: “H”)
(Not used)
FULL or immediately before EMPTY of ATRAC data (When ASC=DSC+1: “H”)
(Not used)
ATRAC data EMPTY (When DSC=ASC: “H”) (Not used)
Indicates recording/playback data main/sub (“H”: Sub, Linking: “L”: Main) (Not used)
Interpolation sync signal output (Not used)
DSC counter mode output (Not used)
System clock 512fs signal output
Ground
Main data sync detection signal output (Not used)
Input of L/R clock signal from CXD2535CR (IC121) (44.1 kHz)
Input of bit clock signal from CXD2535CR (IC121) (2.8224 MHz)
Input of C2PO signal from CXD2535CR (IC121) (Shows data error status)
Playback:C2PO (“H”)
Input of playback audio data signal from CXD2535CR (IC121)
Input of digital audio input data (Not used)
Output of digital audio output data
Disc drive and EFM encoder/decoder recording/playback mode output (Not used)
Input of defect ON/OFF switching signal
Pin 87 (SPO) input/output switching input (“L”:IN. “H”:OUT) (Fixed at “H”)
RAM controller internal master clock output (Not used)
Ground
Function
Pin No.
Pin Name
I/O
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