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MDS-JE480
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Description
Pin No.
Pin Name
I/O
XCAS
XRAS
A09
A08
A10
A07
A00
A06
A01
A05
A02
VDC2
VSC2
A04
A03
DRVDD1
DRVSS1
TEST0
TEST1
TEST2
AVD1
ASYO
ASYI
BIAS
RFI
AVS1
PCO
FILI
FILO
CLTV
PEAK
TE
AVD2
AVS2
DCHG
APC
ADFG
CAS signal output for DRAM
RAS signal output for DRAM
DRAM address output
Not used (Open)
DRAM address output
Power supply
Ground
DRAM address output
DRAM address output
Power supply
Ground
Not used (Fixed at “L”)
Not used (Fixed at “H”)
Not used (Open)
Power supply
Play back EFM duplex signal output
Play back EFM comparator slice level input
Play back EFM comparator bias current input
Play back EFM RF signal input
Ground
Phase comparison output for the recording/playback EFM master PLL
Filter input for the recording/playback EFM master PLL
Filter output for the recording/playback EFM master PLL
Internal VCO control voltage input for the recording/playback EFM master PLL
Light amount signal peak hold input
Light amount signal bottom hold input
Light amount signal input
Focus error signal input from the CXA2523AR
Auxiliary A/D input
Middle point voltage input from the CXA2523AR
Monitor output of the A/D converter input signal (Not used) (Open)
A/D converter operational range upper limit voltage input (Fixed at “H”)
A/D converter operational range lower limit voltage input (Fixed at “L”)
Sled error signal input from the CXA2523AR
Tracking error signal input from the CXA2523AR
Power supply
Ground
Connected to +3V power supply
APC error signal input (Not used) (Fixed at “H”)
ADIP duplex FM signal input from the CXA2523AR
O
O
O
O
O
O
O
O
O
O
O
—
—
O
O
—
—
I
I
I
—
O
I (A)
I (A)
I (A)
—
O (3)
I (A)
O (A)
I (A)
I (A)
I (A)
I (A)
I (A)
I (A)
I (A)
O (A)
I (A)
I (A)
I (A)
I (A)
—
—
I (A)
I
I
• Abbreviation
EFM: Eight to Fourteen Modulation
PLL : Phase Locked Loop
VCO: Voltage Controlled Oscillator
* I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O
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TEL 13942296513 QQ 376315150 892498299
