– 72 –
4-12.
IC PIN FUNCTION DESCRIPTION
•
AUDIO BOARD IC308 CXD8482Q (SBM + Digital Filter)
Pin No.
Pin Name
I/O
Function
1
TEST
I
Test input pin. “H” for test mode and “L” for normal mode. (Fixed at “L” level in this set.)
2
NC
—
Empty pin
3
SYNC
I
Sync mode setting pin. “H” for INT master mode and “L” for EXT slave mode.
4
INIT
I
A/D converter power down mode input from main microcomputer (IC501). (“H” active)
(This IC is set OFF in digital input/output mode.)
5
NC
—
Empty pin
6
CFLG
O
FE calibration flag output (Not used in this set, empty pin.)
7, 8
VDD
—
Power supply pin (+5V)
9
LRKI
I
L/R clock input (Not used in this set, fixed at “L” level.)
10
BKI
I
Beat clock input (Not used in this set, fixed at “L” level.)
11
NC
—
Empty pin
12
DLI
I
L channel data input (Not used in this set, fixed at “L” level.)
13
DRI
I
R channel data input (Not used in this set, fixed at “L” level.)
14
IFLG
O
FE sync flag output (Not used in this set, empty pin.)
15, 16
NC
—
Empty pin
17
FE
I
FE select input (Not used in this set, fixed at “L” level.)
18
AL2
I
Data signal (L) input (Not used in this set, fixed at “L” level.)
19
AR2
I
Data signal (R) input (Not used in this set, fixed at “L” level.)
20
AL1
I
Data signal (L) input from A/D converter (IC307).
21
AR1
I
Data signal (R) input from A/D converter (IC307).
22, 23
VSS
—
Ground
24, 25
CVSS
—
Ground
26
FCLK
O
Output of 128fs master clock for FE to A/D converter (IC307).
27
MCLK
I
Input of 256fs master clock from FS clock generator (IC325).
28
CVDD
—
Power supply pin (+5V)
29
NC
—
Empty pin
30
IBIT
I
64fs input data mode select input (“H”: 4bit, “L”: 1bit) (Fixed at “L” level in this set.)
31
NC
—
Empty pin
32
VSS
—
Ground
33
SCALE
I
Scale select input (“H”:
×
4, “L”:
×
5) (Fixed at “L” level in this set.)
34
ISEL1
I
FS select of input data (Fixed at “L” level in this set.)
35
ISEL2
I
FS select of input data (Fixed at “L” level in this set.)
Dither control input. Dither active when “H” and stopped when “L”.
(Not used in this set, empty pin.)
Boost control input. Boost active when “H” and normal when “L”.
(Fixed at “H” level in this set.)
Serial data signal input from main microcomputer (IC501).
Shift clock signal input from main microcomputer (IC501). (Shift when
↓
, latch when
↑
)
Latch pulse signal input from main microcomputer (IC501).
Low cut control input. “H” for low frequency cut and “L” for flat. (Fixed at “H” level in this
set.)
45
SBM
I
Super Bit Mapping (SBM) control input from main microcomputer (IC501).
(“H”: ON, “L”: OFF)
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