5-2
5-2 E
Pin No.
Pin name
71
CPUCK
CPU clock (25 MHz) signal output
72
NMIX
73
HSTX
74
FRRSTIN
Reset signal input from IF CON
75
VSS
76
MD0
“H
”)
77
MD1
“L
”)
78
MD2
“L
”)
79
XW
AIT
I
W
ait signal input
80
BGRNTX
–
T
est terminal (f
ixed a
t
“H
”)
81
BRQ
–
T
est terminal (f
ixed a
t
“L
”)
82
RD
O
Read enable signal output
83
WRH
O
High byte write enable signal output (16 bit and 8 bit)
84
WRL
O
Lo
w b
yte wr
ite enab
le signal output (16 bit onl
y)
85
–
92
HD0-HD7
I/O
Da
ta b
us D0-D7 (16 bit onl
y)
93
–
100
HD8-HD15
I/O
Da
ta b
us D8-D15 (16 bit) ,
D0-D7 (8 bit)
101
VSS
–
Ground
102
–
109
HA0-HA7
O
Ad
dr
ess b
us
A00-A07
110
VCC
–
P
o
wer supply
111
–
118
HA8-HA15
O
Ad
dr
ess b
us
A08-A15
119
VSS
–
Ground
120
HA16
O
Ad
dr
ess b
us
A16
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