48
SCD-C555ES
Pin No.
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
Pin Name
SUPDT7
XSUPAK
VSC
TESTO
TESTI
TESTI
TESTO
VDC
TESTO
TESTO
BCKASL
VSDSD
BCKAI
BCKAO
PHREFI
PHREFO
ZDFL
DSAL
ZDFR
DSAR
VDDSD
ZDFC
DSAC
ZDFLFE
DSALFE
VSDSD
ZDFLS
DSALS
ZDFRS
DSARS
VDDSD
TESTO
TESTO
VSC
TESTO
TESTO
VDC
TESTO
TESTO
VSIO
TESTO
TESTI
TESTI
VDIO
TESTO
TESTO
TESTO
I/O
O
O
—
O
I
I
O
—
O
O
I
—
I
O
I
O
O
O
O
O
—
O
O
O
O
—
O
O
O
O
—
O
O
—
O
O
—
O
O
—
O
I
I
—
O
O
O
Description
Output terminal for supplementary data (MSB).
Output terminal for supplementary data acknowledge.
Ground terminal for core.
Output terminal for testing. Keep open.
Input terminal for testing. Fix “L”.
Input terminal for testing. Fix “L”.
Output terminal for testing. Keep open.
Power terminal for core. 2.5 V.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Bit clock input/output selection terminal for DSD data output. “L” is input (slave) and “H” is output (Master).
Ground terminal for DSD data output.
Bit clock input terminal for DSD data output. When BCKASL is “L”, input bit clock into this terminal.
Bit clock output terminal for DSD data output. When BCKASL is “H”, bit clock is output from this terminal.
Phase reference signal input terminal for DSD output phase modulation.
Phase reference signal output terminal for DSD output phase modulation.
Zero data detection flag in channel R (when setting microcomputer). When no sound data keeps for 300 msec,
this flag changes to “H”.
Output terminal for DSD data in channel L.
Zero data detection flag in channel L (when setting microcomputer). When no sound data keeps for 300 msec,
this flag changes to “H”.
Output terminal for DSD data in channel R.
Power terminal for DSD data output. Supply a +3.3 V that is separated from other digital power source.
Zero data detection flag in channel C (when setting microcomputer). When no sound data keeps for 300 msec,
this flag changes to “H”.
DSD data output terminal in channel C.
Zero data detection flag in channel LFE (when setting microcomputer). When no sound data keeps for 300
msec, this flag changes to “H”.
DSD data output terminal in channel LFE.
Ground terminal for DSD data output.
Zero data detection flag in channel LS (when setting microcomputer). When no sound data keeps for 300 msec,
this flag changes to “H”.
DSD data output terminal in channel LS.
Zero data detection flag in channel RS (when setting microcomputer). When no sound data keeps for 300 msec,
this flag changes to “H”.
DSD data output terminal in channel RS.
Power terminal for DSD data output. Supply a +3.3 V that is separated from other digital power source.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Ground terminal for core.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Power terminal for core. 2.5 V.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Ground terminal for input and output.
Output terminal for testing. Keep open.
Input terminal for testing. Fix “L”.
Input terminal for testing. Fix “L”.
Power terminal for input and output. 3.3 V.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Summary of Contents for SCD-C555ES - Super Audio Cd
Page 18: ...18 18 SCD C555ES 4 2 SCHEMATIC DIAGRAM RF SECTION Refer to page 40 for Waveforms IC B D 390p ...
Page 28: ...28 28 SCD C555ES 4 12 SCHEMATIC DIAGRAM AUDIO SECTION 2 2 Page 31 Page 31 IC B D ...
Page 29: ...29 29 SCD C555ES 4 13 SCHEMATIC DIAGRAM D POWER SECTION ...
Page 34: ...34 34 SCD C555ES 4 19 SCHEMATIC DIAGRAM HP SECTION TO AUDIO BOARD 1 2 Page 27 ...
Page 38: ...38 38 SCD C555ES 4 23 SCHEMATIC DIAGRAM POWER SECTION 27 ...
