51
SCD-C555ES
• MAIN BOARD IC803 CXD9647 (DSD DSP)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
I/O
—
O
O
O
I
I
I
—
O
O
O
O
O
O
O
O
Ipd
Ipd
O
—
Ipd
—
I
O
—
—
Ipd
O
Ipd
O
—
I
—
I
—
I
—
I
—
I
—
I
—
O
O
O
I
O
Description
Power terminal. 3.3 V.
Output enable terminal for microcomputer serial communication. When using tri-state buffer externally, activates
by this terminal. When outputs “MSDATO”, “L” is shown.
Output ready flag for microcomputer serial communication. When completing, outputs “L”. Open drain.
Data output terminal for microcomputer serial communication. Hi-Z except for output.
Data input terminal for microcomputer serial communication. Inputs data and address with serial from
microcomputer.
Shift clock input terminal for microcomputer serial communication. Imports and shifts serial input data by setting up
clock that inputs into this terminal. When reading out, read data change by falling of clock that inputs into this terminal.
Latch input terminal for microcomputer serial communication. Latches address and data at falling this signal.
Ground terminal
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Input terminal for testing (pull down). Keep open or fix “L”.
Input terminal for testing (pull down). Keep open or fix “L”.
Output terminal for testing. Keep open.
Ground terminal
Input terminal for testing (pull down). Keep open or fix “L”.
Ground terminal
Input terminal for testing. Fix “L”.
Output terminal for testing. Keep open.
Power terminal. 3.3 V.
Ground terminal
Input terminal for testing (pull down). Keep open or fix “L”.
Bit clock output terminal for DSD data phase modulation input. Outputs 128 Fs.
Input terminal for testing (pull down). Keep open or fix “L”.
Bit clock output terminal for DSD data normal input or phase reference signal output terminal for phase modulation
input. Outputs 64 Fs.
Ground terminal
DSD data input terminal 1
Ground terminal
DSD data input terminal 2
Power terminal. 3.3 V.
DSD data input terminal 3
Ground terminal
DSD data input terminal 4
Ground terminal
DSD data input terminal 5
Power terminal. 3.3.V.
DSD data input terminal 6
Ground terminal
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Output terminal for testing. Keep open.
Input terminal for testing. Fix “L”.
Output terminal for testing. Keep open.
Pin Name
VDD
XMSDOE
MSREADY
MSDATO
MSDATI
MSCK
XMSLAT
GND
TESTO
TESTO
TESTO
TESTO
TESTO
TESTO
TESTO
TESTO
TESTI
TESTI
TESTO
GND
TESTI
GND
TESTI
TESTO
VDD
GND
TESTI
FS128
TESTI
FS64
GND
DSI1
GND
DSI2
VDD
DSI3
GND
DSI4
GND
DSI5
VDD
DSI6
GND
TESTO
TESTO
TESTO
TESTI
TESTO
Ipd : Pull douwn input
Summary of Contents for SCD-C555ES - Super Audio Cd
Page 18: ...18 18 SCD C555ES 4 2 SCHEMATIC DIAGRAM RF SECTION Refer to page 40 for Waveforms IC B D 390p ...
Page 28: ...28 28 SCD C555ES 4 12 SCHEMATIC DIAGRAM AUDIO SECTION 2 2 Page 31 Page 31 IC B D ...
Page 29: ...29 29 SCD C555ES 4 13 SCHEMATIC DIAGRAM D POWER SECTION ...
Page 34: ...34 34 SCD C555ES 4 19 SCHEMATIC DIAGRAM HP SECTION TO AUDIO BOARD 1 2 Page 27 ...
Page 38: ...38 38 SCD C555ES 4 23 SCHEMATIC DIAGRAM POWER SECTION 27 ...
