XAV-AX200/AX200C2
XAV-AX200/AX200C2
44
44
5-21. SCHEMATIC DIAGRAM - TFT Board (5/8) (XAV-AX200) -
A
E
D
B
C
1
2
3
4
5
6
7
8
(5/8)
TFT BOARD
F
F
Pull High at power up for normal boot
HW_CFG2/4/5/6 for boot source selection
HW CFG
Debug
BT
MCU
&25(567
27MHZ
1$1')/$6+
+:B&)*
0
+:B&)*
+:B&)*
0
Boot Mode
0
1
1
1
1
0
0
1
0
0
0
1
1
1
0
1
Auto Scan
SD CARD ISP
SPI_NAND
UART_ISP
SPI_NAND_X2
USB_ISP
NAND
SPI_NOR_X2
,630RGH
;
;
1
1
;
;
;
;
;
;
0
1
0
0
+:B&)*
+:B&)*
+:B&)*
0
Boot Mode
1
0
1
0
1
1
SPI_NAND
USB_ISP
NAND
,630RGH
;
1
1
;
;
$GGVK
67$786
5&
5&
5&
OLQX[
C197
10uF
R1
33
10K
R139
1&
C192
104
C35
104
R153 100R
R154
10K
C199
22pF
R127
1M
C196
22pF
R135
0R
R170
1&
R1
75
10K
R1
77
NC
R1
78
10K
1
NC
2
NC
3
NC
4
R/B4
5
R/B3
6
R/B2
7
R/B1
8
/RE
9
/CE0
10
/CE1
11
NC
12
VCC
13
VSS
14
/CE3
15
/CE4
16
CLE
17
ALE
18
/WE
19
/WP
20
NC
21
NC
22
NC
23
NC
24
NC
25
NC
26
NC
27
NC
28
NC
29
D0
30
D1
31
D2
32
D3
33
NC
34
NC
35
NC
36
VSS
37
VCC
38
NC
39
NC
40
NC
41
D4
42
D5
43
D6
44
D7
45
NC
46
NC
47
NC
48
NC
U16
:1*96,$$
C265
104
C266
104
R102
33R
R116
33R
1
2
3
4
CON10
4Pin-2.0
R9
9
10K
R1
25
NC
1
2
3
4
X4
27M
R1
90
10K
C264
NC
R1
68
10K
R1
69
10K
R1
71
10K
R1
72
10K
R1
73
10K
R1
74
10K
R1
76
10K
R1
79
10K
R1
80
10K
R8
NC
R1
1
10K
R4
8
10K
R1
01
10K
R1
32
10K
R1
38
10K
R1
91
10K
R192
10K
Always On
F5
SPI_CE
F6
SPI_D[1]
G5
SPI_D[2]
G6
SPI_D[0]
H4
SPI_CLK
H5
SPI_D[3]
C4
NAND_RDY
C5
NAND_RE_B
C6
NAND_CE0_B
D5
NAND_CLE
D6
NAND_ALE
E1
NAND_WE_B
E2
NAND_WP_B
E4
NAND_D[7]
E5
NAND_D[6]
F1
NAND_D[5]
F2
NAND_D[4]
F3
NAND_D[3]
G2
NAND_D[2]
G3
NAND_D[1]
H1
NAND_D[0]
J2
XTAL_IN
J1
XTAL_OUT
K1
X32CK_OUT
K2
X32CK_IN
K6
X32CK_AVDD
J6
X32CK_AVSS
L6
VDD33_IOP
M6
VDD10_IOP
F4
UA0_RX/GPIO[92]
H17
UA1_TX//GPIO[85]
G18
UA1_RX/GPIO[86]
R21
UA2_TX/GPIO[49]
R20
UA2_RX/GPIO[50]
N21
UA4_TX/GPIO[61]
N20
UA4_RX/GPIO[62]
M21
UA4_CTS/GPIO[63]
M20
UA4_RTS/GPIO[64]
L22
GPIO[65]
R19
UA5_TX/GPIO[51]
R18
UA5_RX/GPIO[52]
P21
UA5_RTS/GPIO[53]
P22
UA5_CTS/GPIO[54]
R17
GPIO[55]
P18
INT/GPIO[56]
P17
BT_PCM_SYN/GPIO[57]
N19 BT_PCM_CLK/GPIO[58]
N18
BT_PCM_DO/GPIO[59]
N22
BT_PCM_DI/GPIO[60]
L2
RESET_B
L1
PWR_EN
L4
CFG6/GPIO[6]
L3
CFG5/GPIO[5]
K5
CFG4/GPIO[4]
K4
CFG3/GPIO[3]
J5
CFG2/GPIO[2]
J4
CFG1/GPIO[1]
J3
IR/GPIO[0]
H2
UA0_TX/GPIO[91]
8)
$5
R1
96
10K
R1
23
10K
TP
21
TP
23
TP24
TP
26
TP
27
TP
28
RN7
33Rx4
RN12
33Rx4
RN14
10Rx4
TP
17
TP
32
TP
39
TP
40
R300
0R
R301
0R
R302
0R
TP
41
TP
42
TP
43
R307
100R
R308
100R
R309
10K
C367
3
R118
1&
D9
NC
1
GIN1
2 GIN2
3
AVDD
4
AGND
5
BIN1
6
BIN2
7
REF
8 REFP
9 REFN
10 AGND
11 TAOUT
12
RIN1
13
RIN2
14
AVDD
15
AGND
16
CSYNC_A
17
D
VDD_
C
18
DG
N
D
19
DVDD_
IO
20
CH
SI
21
VSI
22
TEST1
23
TEST2
24
TEST3
25
DVDD_
C
26
DG
N
D
27
SLEEP
28
STATUS
29
DVDD_
C
30
DG
N
D
31
DVDD_
IO
32
DE
33
FID
34
HSYNC_L
35
VSYNC_L
36
DO0
37
DO1
38
DO2
39
DO3
40
DO4
41
DO5
42
DO6
43
DO7
44
DVDD_C
45
DGND
46
DVDD_IO
47
CLKO
48
RESETN
49
XOSCI
50
XOSCO
51
SDA
52
SCL
53
DVDD_
C
54
DG
N
D
55
SAS
56
DVDD_
IO
57
PV
D
D
_A
58
PG
N
G
_A
59
CVB
S1
60
CVB
S2
61
CVB
S3
62
CVB
S4
63
AVDD
64
AG
ND
8
0/9
C1
1uF
C2
1uF
C31
1uF
C48
224
C144
10nF
1
2
3
4
X2
32MHz
C146
15pF
R1
4K7
C104
224
C105
224
R69
75R
R63
75R
R7
0
75R
R73
1K
R62
1M
R74
680R
R85
4K7
R86
4K7
R87
4K7
C24
104
TP20
C155
104
C156
104
C158
10uF
C159
104
C96
104
C97
104
C98
104
C99
104
C100
104
C8
5
NC
C154
104
C186
104
C300
10uF
C301
10uF
RN9
33Rx4
RN10
33Rx4
R221
1K
C320
104
C321
104
C322
103
C323
103
C324
103
R88 33R
R220
0R
R305
NC
C364
NC
C365
NC
R2
10K
R1
05
10K
C145
15pF
C393
NC
[3,5,6,7]
CORE_3V3
[1]
RST_CORE
>@
8$B7;
[1]
UA4_RX
[1]
UA2_TX
[1]
UA2_RX
[8]
UA5_TX
[8]
UA5_RX
[8]
UA5_CTS
UA5_RTS
[8]
GPIO55
[1]
GPIO56
[5]
NF_D7
[5]
NF_D6
[5]
NF_D5
[5]
NF_D4
[5]
NF_D3
[5]
NF_D2
[5]
NF_D1
[5]
NF_D0
[1,5]
HW_CFG4
HW_CFG3
[1,5]
HW_CFG2
HW_CFG1
IVMX2
IR_IN
>@
6;0B&7/
[3,4]
CORE_1V1
[3]
IOP_3V3
[3,5,6,7]
CORE_3V3
[3,5,6,7]
CORE_3V3
[3,5,6,7]
CORE_3V3
[1,5]
HW_CFG2
[3,5]
NAND_3V3
[3,5]
NAND_3V3
[5]
NF_RDY1
NAND_CS1
[5]
NF_D7
[5]
NF_D6
[5]
NF_D5
[5]
NF_D4
[3,5]
NAND_3V3
[5]
NF_D0
[5]
NF_D1
[5]
NF_D2
[5]
NF_D3
NF_RDY3
NF_RDY2
NF_CS3
NF_CS2
[5]
NF_RDY1
[5] NF_R/B1
[1]
DAB_TX
[1]
DAB_RX
[1,5]
HW_CFG4
[3,5,6,7]
CORE_3V3
[3,5,6,7]
CORE_3V3
[5]
NF_/WP
[5]
NF_/WE
[5]
NF_/RE
[5] NF_/RE
[5]
NF_R/B1
[5] NF_R/B1
[5] NF_/CE0
[5]
NF_/CE0
[5]
NF_AE
[5]
NDF_CE
[5] NF_AE
[5] NDF_CE
[5] NF_/WE
[5] NF_/WP
[1]
GPS_B
[1]
GPS_R
[1]
GPS_G
[1] GPS-SYNC
[1]
ML86_S
D
A
[1]
ML86_S
C
L
[2,
5]
MLV
_D
_3V
3
[2,5]
MLV_3V3
[2,5]
MLV_3V3
[2,
5]
C_
1V
5
[2,
5]
MLV
_D
_3V
3
DG
N
D
[2,
5]
C_
1V
5
DG
N
D
[2,
5]
C_
1V
5
DG
N
D
[2,
5]MLV
_D
_3V
3
[2,5]
C_1V5
DGND
[2,5]
MLV_D_3V3
[2,5]
MLV_3V3
GND
[2,
5]
C_
1V
5
[2]
A_
1V
5
[2,
5]
MLV
_3V
3
[2,5]
MLV_D_3V3
[6]
656_IN_CLK
DGND
DGND
[7]
VADC1
DGND
DGND
DG
N
D
DG
N
D
DGND
>@
0/B567
[2,5]
MLV_3V3
[6]
656_IN_D7
[6]
656_IN_D6
[6]
656_IN_D5
[6]
656_IN_D4
[6]
656_IN_D3
[6]
656_IN_D2
[6]
656_IN_D1
[6]
656_IN_D0
SYS SET
2018/04/20 05:09:38 (GMT+09:00)