Hardware Installation
SY-7VBA 133
48
Depending on the DRAM speeds, the user can select one of these speeds
through the BIOS.
(4) AGP Clock
The AGP clock is derived from the CPU FSB frequency. It is divided by
1.0, 1.5 or 2.0 depending on the setting of JP6, JP7, CJ1 and CJ2:
Please refer to page 43 for the JP6, JP7, CJ1 and CJ2 settings.
(5) Vcore Voltage Adjust
The CPU notifies the board of what core voltage it requires by its VID
outputs. The on-board voltage regulator uses the VID code to set the core
voltage. If the
Vcore Voltage Adjust
is set to normal, the Vcore will be
exactly what the VID code specifies. If an adjustment percentage is
selected the Vcore will be that percentage higher than the VID code
specifies. For instance the CPU VID code specifies 2.0V and the Vcore
Voltage adjust is set to +10.0% the actual CPU Voltage will be 2.2V. This
function should only be used if the CPU is running on FSB Frequencies
beyond the CPU specifications, note that SOYO does not guarantee
system stability if this item is not set to normal.
o
Normal
o
+ 2.5 %
o
+ 5.0 %
o
+ 7.5%
o
+10.0 %
Step 4.
Select [SAVE & EXIT SETUP]
Press
<Enter>
to save the new configuration to the CMOS memory, and
continue the boot sequence.
Summary of Contents for SY-7VBA 133
Page 99: ...95 ...