Trigger modes and appendant registers
Trigger delay
(c) Spectrum GmbH
89
The example shows, how to use the forcetrigger command:
It is also possible to enable (arm) or disable (disarm) the card’s whole triggerengine by software. By default the trigger engine is disabled.
The example shows, how to arm and disarm the card’s trigger engine properly:
Trigger delay
All of the Spectrum M3i series cards allow the user to program an
additional trigger delay. As shown in the trigger overview section,
this delay is the last element in the trigger chain. Therefore the user
does not have to care for the sources when programming the trigger
delay.
As shown in the overview the trigger delay is located after the star-
hub connection meaning that every M3i card being synchronized
can still have its own trigger delay programmed. The Star-Hub will
combine the original trigger events before the result is being delayed.
The delay is programmed in samples. The resulting time delay will
therefore be [Programmed Delay] / [Sampling Rate].
The following table shows the related register and the possible values. A value of 0 disables the trigger delay.
The example shows, how to use the trigger delay command:
Using the delay trigger does not affect the ratio between pre trigger and post trigger recorded number of samples, but only shifts
the trigger event itself. For changing these values, please take a look in the relating chapter about „Acquisition Modes“.
spcm_dwSetParam_i32 (hDrv, SPC_M2CMD, M2CMD_CARD_FORCETRIGGER); // Force trigger is used.
Register
Value
Direction
Description
SPC_M2CMD
100
write
Command register of the M2i/M3i/M4i series cards.
M2CMD_CARD_ENABLETRIGGER
8h
Enables the trigger engine. Any trigger event will now be recognized.
M2CMD_CARD_DISABLETRIGGER
20h
Disables the trigger engine. No trigger events will be recognized.
spcm_dwSetParam_i32 (hDrv, SPC_M2CMD, M2CMD_CARD_ENABLETRIGGER); // Trigger engine is armed.
...
spcm_dwSetParam_i32 (hDrv, SPC_M2CMD, M2CMD_CARD_DISABLETRIGGER); // Trigger engine is disarmed.
Register
Value
Direction
Description
SPC_TRIG_AVAILDELAY
40800
read
Contains the maximum available delay as a decimal integer value.
SPC_TRIG_DELAY
40810
read/write
Defines the delay for the detected trigger events.
0
No additional delay will be added. The resulting internal delay is mentioned in the technical data section.
8…[8G -8] in steps of 8 (12, 14 and 16 bit cards)
Defines the additional trigger delay in number of sample clocks. The trigger delay is a full 33 bit counter and can
therefore be programmed up to (8GSamples - 8) = 8589934584. Stepsize is 8 samples for 12, 14 and 16 bit cards.
16…[8G -16] in steps of 16 (8 bit cards)
Defines the additional trigger delay in number of sample clocks. The trigger delay is a full 33 bit counter and can
therefore be programmed up to (8GSamples - 16) = 8589934576. Stepsize is 16 samples for 8 bit cards.
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_DELAY, 2000); // A detected trigger event will be
// delayed for 2000 sample clocks.
