Hardware layout and configuration
UM1974
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DocID028599 Rev 7
CN10
22
GND
GND
-
ground
-
24
D40
TIMER_A_PWM2N
PE10
TIM1_CH2N
26
D39
TIMER_A_PWM3N
PE12
TIM1_CH3N
28
D38
I/O
PE14
I/O
30
D37
TIMER_A_BKIN1
PE15
TIM1_BKIN1
32
D36
TIMER_C_PWM2
PB10
TIM2_CH3
34
D35
TIMER_C_PWM3
PB11
TIM2_CH4
1. For more details refer to
Table 12: Solder bridges
.
2. PA7 is used as D11 and connected to CN7 pin 14 by default, if JP6 is ON, it is also connected to both
Ethernet PHY as RMII_DV and CN9 pin 15. In this case only one function of the Ethernet or D11 must be
used.
3. PE2 is connected to both CN9 pin 14 (SAI_A_MCLK) and CN10 pin 25 (QSPI_BK1_IO2). Only one
function must be used at one time.
4. PB13 is used as I2S_A_CK and connected to CN7 pin 5 by default, if JP7 is ON, it is also connected to
Ethernet PHY as RMII_TXD1. In this case only one function of the Ethernet or I2S_A must be used.
Table 13. NUCLEO-F746ZG, NUCLEO-F756ZG and NUCLEO-F767ZI
pin assignments (continued)
Connector Pin
Pin
name
Signal name
STM32 pin
Function
Remark
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