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Figure 52. STM32G081B-EVAL UCPD daughterboard source power
10
10
SOURCE POWER
Title:
Size:
Reference:
Sheet:
of
A4
Revision:
Project:
STM32G081B-EVAL USB-C daughter board
MB1352
C 02
3-Aug-18
Variant name is not interpreted until output
Date:
-
Variant:
PSU
L2
4.7uH(SRN8040-4R7Y)
C49
750pF/50V
R40
51.1K
C50
11pF/50V
R60
[N/A]
R62
93.1K[1%]
R45
220K[1%]
R43
12.4K[1%]
R44
9.1K[1%]
R46
20.5K[1%]
3A
3A
VIN
2
FB
5
RT/CLK
4
BOOT
1
EN
3
COMP
6
GND
7
SW
8
GND
9
U18
TPS54540
C56
100nF
D4
B540C-13-F
Source Power
vPWM mode: 0 and open-drain, 20kHz
VSOURCE
R61
7.5K[1%]
C57
470nF/50V
R54
5.1K[1%]
R53
82K[1%]
PWM voltage control
R51
[N/A]
VDD
V_CTL2
V_CTL1
VSOURCE_9V
PWM_CTL
VSOURCE_15V
PWM_CTL
VSOURCE_9V
R6
3K[1%]
R3
200K[1%]
DCDC_EN
VSOURCE_15V
DCDC_EN
R7
0
R83
330K[1%]
VSENSE_DCDC
R84
49.9K[1%]
3
2
1
5
4
U29
TSV911ILT
+3V3
C41
100nF
R101
43K
C48
10nF
DCDC_EN
C
106
2.2uF[
G
R
M
188R
61E225M
A
12]
C
107
2.2uF[
G
R
M
188R
61E225M
A
12]
C5
9
2.2uF[
G
R
M
188R
61E225M
A
12]
C
105
22uF[
G
R
M
21B
R
6
E226M
E44]
R110
0
R111
[N/A]
C108
[N/A]
C5
3
56uF/25V
[25SV
PF56M
]
C5
2
22uF[
G
R
M
21B
R
6
E226M
E44]
C
103
1uF[
G
R
M
155R
61E105M
A
12]
C
104
4.7nF[
G
R
M
155R
71E472K
A
01]
SB14
SB2
SB15
SB23
SB13
SB3
C109
68pF/50V
R127
0
GPIO mode
Fixed voltage output:5V/9V/15V
VSENSE_DCDC:
Detect U18 output voltage level
Mode
GPIO
PWM(Default)
Mount
Removed
SB13,SB14,SB15
SB2,SB3,SB23,SB26
SB13,SB14,SB15
Step2: PWM_CTL provides about 0.8V level before DCDC_EN=1
Step1: DCDC_EN detects its voltage to ensure PSU 19V exist
Step3: DCDC_EN=1, then PWM_CTL changes to provide PWM
waveform by 0 and open-drain
SB2,SB3,SB23,SB26
SB26