S/AI
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4.2.2 Application Specific Pin Description
4.2.2.1 TIO Pin Configuration
Type:
PU – Pull-up; PD – pull-down; PWR – Power; I – Input; O – Output; I/O – bidir.; OD – open drain: PP – push/pull;
RF: RadioFreq; I-DIS – Input Buffer Disconnected
Pin Name
Signal
TIO-Function
Type
Act
Description
E-6
VSUP1
Power
PWR
+3,3V nom.
F-6
VSUP2
Power
PWR
+3,3V nom
C-1
not connected
none
A-7,E-7,F-7,
B-[5,6,7,8],
C-[5,6,7,8],
D-8, E-8, F-8
GND
Power
PWR
Ground
A-8
ANT
DNU
(4)
RF
leave open
B-1
EXT-RES#
Reset
I-PU
L
User Reset
A-6
XL-IN/SLCK
SLCK / XTAL
I
32,768kHz Slow Clock (optional)
F-4
UART-TXD
TXD
O-PP
IUR Data OUT
(6)
D-2
UART-RXD
RXD
I-PU
IUR Data IN
(6)
D-7
UART-RTS#
/RTS
O-PP
(1)
L
Flow Control/IUC; refer to [3]
F-3
UART-CTS#
/CTS
I-PD
L
Flow Control/IUC; refer to [3]
B-4
IUR-OUT#
/IUR-OUT
O-PP
(3)
L
UICP Control; refer to [3]
D-5
IUR-IN#
/IUR-IN
I
(3)
L
UICP Control; refer to [3]
D-3 SCL
GPIO[0]
GPIO[0]
(3)
I/O
(3)
GPIO
(3)
[I2C-SCL]
B-2 SDA
GPIO[1]
GPIO[1]
(3)
I/O
(3)
GPIO
(3)
[I2C-SDA]
D-1 IOC
GPIO[2]
IOC
(3)
I/O
(3)
GPIO
(3)
[SPI-MOSI]
E-4 IOB
GPIO[3]
IOB
(3)
I/O
(3)
GPIO
(3)
D-4
GPIO[4]
HANGUP
I-PD
optional; refer to [5]
F-2 IOD
GPIO[5]
IOD
(3)
I/O
(3)
GPIO
(3)
[SPI-MISO]
C-4
GPIO[6]
reserved
I-DIS
GPIO
(3)
C-3
GPIO[7]
GPIO7
I-DIS
GPIO
(3)
E-2 IOA
GPIO[8]
IOA
(3)
I/O
(3)
GPIO
(3)
[SPI-SCK] [DEVICE READY#]
A-3
not connected
none
none
A-1
GPIO[10]
DNU
(4)
I-DIS
leave open
A-4
not connected
none
none
A-2
GPIO[9]
DNU
(4)
I-DIS
leave open
F-1
TESTMODE#
reserved
I-PU
L
connect to test pad
(6)
E-1
BOOT0
reserved
I-PD
connect to test pad
(6)
E-3
SWDIO
reserved
I/O-PU
leave open (serial wire)
D-6
SWCLK
reserved
I-PD
leave open (serial wire)
C-2
GPIO[13]
DNU
(4)
I-DIS
leave open
B-3
GPIO[11]
DNU
(4)
I-DIS
leave open
A-5
XL-OUT
XTAL
I-DIS
leave open if no ext. XTAL is connected
F-5
GPIO[14]
DNU
(4)
I-DIS
leave open
E-5
GPIO[12]
DNU
(4)
I-DIS
leave open
Notes:
(1)
a discrete resistor is used
(3)
function depends on firmware. If function can be enabled using an AT-command, type is I-DIS when not enabled
(4)
DNU: Do Not Use, Do Not Connect
(6)
signal must be accessible for homologation purposes. Refer to 3.10 Test Mode Enable
Table 6: Application Specific Pin Assignments, TIO