Chapter 3
Power-On Self-Test
3-9
DIMM 2: 0 MBytes = 0x00000000 bytes
DIMM 3: 0 MBytes = 0x00000000 bytes
Found 1 DIMMs in bank 0
Bank 0: 512 MBytes
DIMM0 is a 32M x 8 device
MC0 = 0x00000000.56a0bc04
MC1 = 0x00000000.c0804000
MC2 = 0x00000000.0f1f000e
MC3 = 0x00000000.00000086
Ecache Tests
Displacement Flush Ecache
Ecache RAM Addr Test
Ecache Tag Addr Test
Memory Init
Malloc Post Memory
Memory Addr Check w/o Ecache
Load Post In Memory
Run POST from MEM
.........
Map PROM/STACK/NVRAM in DMMU
Update Master Stack/Frame Pointers
CPU MODULE upa_config is 0x0000003e.00000000
All FPU Basic Tests
FPU Regs Test
FPU Move Regs Test
All Basic UltraSPARC-IIe IOMMU Tests
UltraSPARC-IIe IOMMU Regs Test
UltraSPARC-IIe IOMMU RAM Addr Test
UltraSPARC-IIe IOMMU CAM Address Test
PBMA PCI Config Space Regs Test
PBMA Control/Status Reg Test
PBMA Diag Reg Test
UltraSPARC-IIe IO Regs Test
All Advanced CPU Tests
IU ASI Access Test
FPU ASI Access Test
All CPU Error Reporting Tests
CPU Data Access Trap Test
CPU Addr Align Trap Test
DMMU Access Priv Page Test
DMMU Write Protected Page Test
Audio Tests
Memory Tests
CODE EXAMPLE 3-2
diag-level
Variable Set to
min
Summary of Contents for Sun Blade 100
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