4-8
H8DC8/H8DCi User's Manual
Advanced Chipset Control
North Bridge Confi guration
Memory Confi guration
Memclock Mode
This setting determines how the memory clock is set.
Auto
has the memory
clock by code and Limit allows the user to set a standard value.
MCT Timing Mode
Sets the timing mode for memory. Options are
Auto
and Manual.
User Confi guration Mode
Options are
Auto
and Manual.
Bank Interleaving
Select Auto to automatically enable interleaving-memory scheme when this
function is supported by the processor. The options are
Auto
and Disabled.
Burst Length
Use this setting to set the memory burst length. 64-bit Dq must use 4 beats.
Options are 8 beats,
4 beats
and 2 beats.
Hardware Memory Hole
When "Enabled", this feature enables hardware memory remapping around
the memory hole. Options are
Enabled
and Disabled. Note: this is only
supported by Rev E0 processors and above.
BNode Interleaving
Use this setting to Enable or
Disable
node memory interleaving.
Bank Swizzle Mode
Use this setting to Enable or
Disable
the Bank Swizzle Mode.
