Specifications are subject to change without notice
MT5362ANG/B
Approval Datasheet
Page 18 of 35
MEDIATEK CONFIDENTIAL, NO DISCLOSURE
D10
E1N
O
2~8 mA
LVDS Tx even channel negtive output bit 1
C11
E2P
O
2~8 mA
LVDS Tx even channel positive output bit 2
D11
E2N
O
2~8 mA
LVDS Tx even channel negtive output bit 2
C13
E3P
O
2~8 mA
LVDS Tx even channel positive output bit 3
D13
E3N
O
2~8 mA
LVDS Tx even channel negtive output bit 3
C14
E4P
O
2~8 mA
LVDS Tx even channel positive output bit 4
D14
E4N
O
2~8 mA
LVDS Tx even channel negtive output bit 4
C12
ECKP
O
2~8 mA
LVDS Tx even channel positive clock output
D12
ECKN
O
2~8 mA
LVDS Tx even channel negative clock output
A6
O0P
O
2~8 mA
LVDS Tx odd channel positive output bit 0
B6
O0N
O
2~8 mA
LVDS Tx odd channel negtive output bit 0
A7
O1P
O
2~8 mA
LVDS Tx odd channel positive output bit 1
B7
O1N
O
2~8 mA
LVDS Tx odd channel negtive output bit 1
A8
O2P
O
2~8 mA
LVDS Tx odd channel positive output bit 2
B8
O2N
O
2~8 mA
LVDS Tx odd channel negtive output bit 2
A10
O3P
O
2~8 mA
LVDS Tx odd channel positive output bit 3
B10
O3N
O
2~8 mA
LVDS Tx odd channel negtive output bit 3
A11
O4P
O
2~8 mA
LVDS Tx odd channel positive output bit 4
B11
O4N
O
2~8 mA
LVDS Tx odd channel negtive output bit 4
A9
OCKP
O
2~8 mA
LVDS Tx odd channel positive clock output
B9
OCKN
O
2~8 mA
LVDS Tx odd channel negative clock output
HDMI Receiver
AF16
RX0_0
I
N/A
HDMI Rx 0 positive data bit 0
AE16
RX0_0B
I
N/A
HDMI Rx 0 negative data bit 0
AF17
RX0_1
I
N/A
HDMI Rx 0 positive data bit 1
AE17
RX0_1B
I
N/A
HDMI Rx 0 negative data bit 1
AF18
RX0_2
I
N/A
HDMI Rx 0 positive data bit 2
AE18
RX0_2B
I
N/A
HDMI Rx 0 negative data bit 2
AF15
RX0_C
I
N/A
HDMI Rx 0 positive clock
AE15
RX0_CB
I
N/A
HDMI Rx 0 negative clock
AF12
RX1_0
I
N/A
HDMI Rx 1 positive data bit 0
AE12
RX1_0B
I
N/A
HDMI Rx 1 negative data bit 0
AF13
RX1_1
I
N/A
HDMI Rx 1 positive data bit 1
AE13
RX1_1B
I
N/A
HDMI Rx 1 negative data bit 1
AF14
RX1_2
I
N/A
HDMI Rx 1 positive data bit 2
AE14
RX1_2B
I
N/A
HDMI Rx 1 negative data bit 2
AF11
RX1_C
I
N/A
HDMI Rx 1 positive clock
AE11
RX1_CB
I
N/A
HDMI Rx 1 negative clock
AF8
RX2_0
I
N/A
HDMI Rx 2 positive data bit 0
AE8
RX2_0B
I
N/A
HDMI Rx 2 negative data bit 0
AF9
RX2_1
I
N/A
HDMI Rx 2 positive data bit 1
AE9
RX2_1B
I
N/A
HDMI Rx 2 negative data bit 1
AF10
RX2_2
I
N/A
HDMI Rx 2 positive data bit 2
AE10
RX2_2B
I
N/A
HDMI Rx 2 negative data bit 2
AF7
RX2_C
I
N/A
HDMI Rx 2 positive clock
AE7
RX2_CB
I
N/A
HDMI Rx 2 negative clock
General Purpose Input and Output (GPIO)
E20
GPIO0
I/O
2~8 mA
General Purpose I/O
07.FRQILGHQWLDO
ou
positive clo
ve c
O
annel negative cloc
egative cl
O
odd channel positive output
nnel positive output
LDO
DS Tx odd channel negtive o
dd channel negtive o
WLD
LVDS Tx odd channel po
S Tx odd channel p
WL
A
LVDS Tx odd cha
LVDS Tx odd cha
G QW
H
2~8 mA
LVDS Tx o
8 mA
LVDS Tx
GHHHQ
I
H
O 2~8
mA
LVD
2~8 mA
LVD
IIILGH
HH
I
H
O 2~8
mA
2~8 mA
IIILG
QI
O 2~8
mA
O 2~8
mA
QQQIIIL
QI
O4P O
O
RQQQIII
QI
O4N
O4N
FRQQQ
.
Q
A9 OCKP
9 OCKP
... F
R
.
B9 OCKN
B9
7...
F
07.
HDMI Receiver
DMI Receive
07
07.
07
AF16
AF16
07
07
07
A
A
000
)RU7&/2QO\
channel
Tx odd channel p
odd channel
O\
LVDS Tx odd channel neg
d channel
O\
22QO\
HDMI Rx 0 positive
HDMI Rx 0 p
222QO
2
N/A
HDMI Rx 0
N/A HDMI
/ 222Q
&
2
I N/A
HDM
I N/A
&&&/
222
7&
2
I N/A
I N/A
777&&&/
7&
_2 I
N/A
I N/A
777&&&
7&
RX0_2B I
N
2B I
7777
RX0_C
I
RX0_C
U
)R
5 RX0_CB
RX0_CB
)R
)R
)RU
)R
RX1_0
RX1_
)R
)R
)R
)R
RX
))))
1
B
B
1R
0
1R'LVFORVXUH
ve data bit 2
bit 2
UH
bit 2
H
UH
positive clock
clock
XUH
MI Rx 0 negative clock
MI Rx 0 negative clock
VXU
HDMI Rx 1 positive data
DMI Rx 1 positive data
ORVX
HDMI Rx 1 negativ
HDMI Rx 1 nega
OR
F
N/A
HDMI Rx 1
A
HDMI Rx 1
FFFO
F
N/A HDM
N/A HD
LVFFF
'
F
I N/A
N/A
'''LV
'
I N/A
N/A
'''L
'
1_C I
N
1_C I
N
1R
''''
_CB I
_CB
1R
1R
1
