Factory Alignment Specification
Test Alignment Specification for MT62S-LA.doc (Page 3 of 16)
MT62S-LA chassis is a LA LCD platform with ISDB-T, the main chip is from Mediatek (MTK5362
series) and supports below inputs:
x
One cable analog RF input (PAL-M /N, NTSC-M)
x
One antenna analog and digital mixed RF input (PAL-M /N, NTSC-M, ISDB-T)
x
One
AV
input
x
One CMP input (up to 1080P)
x
One PC input
x
Five HDMI inputs (up to 1080P)
x
One USB input
x
One SPDIF output (optical)
x
One
AV
output
More relevant details are listed in the Spec.
INFO:
ª
All tests and measurements mentioned hereafter have to be carried out at a normal mains voltage
(
100 ~ 240 VAC
).
ª
All voltages have to be measured with respect to ground, unless otherwise stated.
ª
All final tests have to be done on a complete set including LCD panel in a room with temperature of
25+/-7°C.
ª
The White Balance (color temperature) has to be performed into subdued lighted room after at
least
1 hour
of warm-up/burn-in. This is applicable for both Alignment and Picture Performance
evaluation at OQA in order to be set free of any temperature drift (colorimetry vs. time).
1. Electrical Assembly Alignment
1.1.
Preconditions – DC/DC Check
Before Power On the chassis, please check and make sure that the following power outputs
are not shorted to ground. Then supply voltage to P19 (according to PS module in related BOM)
and test the relative voltage.
Position
Value
Remarks
U811 (optional)
3.3V +/-5%
+3V3SB
C123 (positive pin)
5.0V +/-5%
+5V
U9
3.3V +/-5%
DV33
U31
3.3V +/-5%
AV33
U62
3.3V +/-5%
B3_3.3V
U7
1.2V +/-5%
AV125
U63
1.2V +/-5%
B4_1.2V
U6
2.5V +/-5%
AV25
U61
2.5V +/-5%
B2_2.5V
U1 (optional)
5.0V +/-5%
AV_5V
C560 (positive pin)
1.8V +/-5%
DDRV
C561 (positive pin)
1.0V +/-5%
DV11
Note: Different model may have different configuration of DC/DC circuit.
