TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
26
Pin #
Ball #
Pin Name
mode V
type description
34
N3
UART3_RTS_SD
0
3.3
O
UART3 Request To Send ,
IR enable
GPIO_164
4
IO
General-purpose IO 164
Safe_mode
7
35
X
USB_RESET
O
36
N2
UART3_CTS_RCTK 0
3.3
IO
UART3 Clear to Send
(input), Remote TX (output)
GPIO_163
4
IO
General-purpose IO 163
Safe_mode
7
37
AE22
GPIO_29
4
3.3
IO
General-purpose IO 29
ETK_D15
0
O
ETK data 15
HSUSB2_DATA1
3
IO
Single-ended zero. Used as
VM in 4-pin VP_VM mode.
Mm_fsusb2_txse0
5
IO
Single-ended zero. Used as
VM in 4-pin VP_VM mode
38
W4
I2C3_SCL
0
3.3
IOD
I2C Master Serial
clock.Output is open drain.
GPIO_184
4
IO
General-purpose IO 184
Safe_mode
7
39
AC21
GPIO_28
4
3.3
IO
General-purpose IO 28
ETK_D14
0
O
ETK data 14
HSUSB2_D0
3
IO
Differential receiver signal
input
Mm_fsusb2_rxcv
5
IO
Differential receiver signal
input (not used in 3-pin
mode)
40
Y2
SYS_nRESPWRON 0
3.3
IO
Differential receiver signal
input
41
X
ETHER_TX-
O
42
AD2
CCDC_PCLK
0
3.3
IO
CCDC pixel clock
GPIO_94
4
IO
General-purpose IO 94
Hw_dbg0
5
O
Debug signal 0
Safe_mode
7
43
X
E
O
44
AE3
Ccdc_WEN
0
3.3
IO
CCDC write enable
Ccdc_data9
1
I
CCDC data bit 9
Uart4_rx
2
I
UART4 Receive data
GPIO_98
4
IO
General-purpose IO 98
Hw_dbg3
5
O
Debug signal 3
Safe_mode
7
45
X
ETHER_RX-
I
46
AE2
CCDC_HD
0
3.3
IO
CCDC horizontal sync
Uart4_rts
2
O
UART4 Request To Send
GPIO_96
4
IO
General-purpose IO 96
Safe_mode
7
47
X
E
I
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