TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
32
Pin #
Ball #
Pin Name
mode V
type description
97
AD22
DSS_HSYNC
0
3.3
O
LCD Horizontal
Synchronization
GPIO_67
4
IO
General-purpose IO 67
Hw_dbg13
5
O
Debug signal 13
Safe_mode
7
98
AC23
DSS_Data2
0
3.3
IO
LCD Pixel Data bit 2
GPIO_72
4
IO
General-purpose IO 72
Safe_mode
7
99
AE24
DSS_ACBIAS
0
3.3
O
AC bias control (STN) or
pixel data enable (TFT)
output
GPIO_69
4
IO
General-purpose IO 69
Safe_mode
7
100
W25
DSS_Data18
0
3.3
IO
LCD Pixel Data bit 18
MCSPI3_CLK
2
IO
SPI Clock
DSS_Data4
3
O
LCD Pixel Data bit 4
GPIO_88
4
IO
General-purpose IO 88
Safe_mode
7
101
AD23
DSS_VSYNC
0
O
LCD Vertical
Synchronization
GPIO_68
4
IO
General-purpose IO 68
Safe_mode
7
102
Y24
DSS_Data12
0
3.3
IO
LCD Pixel Data bit 12
GPIO_82
4
IO
General-purpose IO 82
Safe_mode
7
103
AD24
DSS_Data0
0
IO
LCD Pixel Data bit 0
UART1_CTS
2
I
UART1 Clear To Send
GPIO_70
4
IO
General-purpose IO 70
Safe_mode
7
104
Y25
DSS_Data13
0
3.3
IO
LCD Pixel Data bit 13
GPIO_83
4
IO
General-purpose IO 83
Safe_mode
7
105
AD25
DSS_Data1
0
3.3
IO
LCD Pixel Data bit 1
UART1_RTS
2
O
UART1 Request To Send
GPIO_71
4
IO
General-purpose IO 71
Safe_mode
7
106
V25
DSS_Data20
0
3.3
O
LCD Pixel Data bit 20
MCSPI3_SOMI
2
IO
Slave data out, master data
in
DSS_Data2
3
O
LCD Pixel Data bit 2
GPIO90
4
IO
General-purpose IO 90
Safe_mode
7
107
AC24
DSS_Data3
0
3.3
IO
LCD Pixel Data bit 3
GPIO_73
4
IO
General-purpose IO 73
Safe_mode
7
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