TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
37
Pin #
Ball #
Pin Name
mode V
type description
150
F3
GPMC_A7
0
3.3
O
GPMC Address bit 7
GPIO_40
4
IO
General-purpose IO 40
Safe_mode
7
151
F6
GPMC_A5
0
3.3
O
GPMC_Address bit 5
GPIO_38
4
IO
General-purpose IO 38
Safe_mode
7
152
E3
GPMC_A1
0
3.3
O
GPMC_Address bit 1
GPIO_34
4
IO
General-purpose IO 34
Safe_mode
7
153
F1
GPMC_A9
0
3.3
O
GPMC Address bit 9
Sys_ndmareq2
1
I
External DMA request 2
(system expansion). Level
(active low) or edge (falling)
selectable.
GPIO_42
4
IO
General-purpose IO 42
Safe_mode
7
154
F4
GPMC_A6
0
3.3
O
GPMC Address bit 6
GPIO_39
4
IO
General-purpose IO 39
Safe_mode
7
155
E2
GPMC_A2
0
3.3
O
GPMC_Address bit 2
GPIO_35
4
IO
General-purpose IO 35
Safe_mode
7
156
E1
GPMC_A3
0
3.3
O
GPMC_Address bit 3
GPIO_36
4
IO
General-purpose IO 36
Safe_mode
7
157
N1
GPMC_CLK
0
3.3
O
GPMC Clock
GPIO_59
4
IO
General-purpose IO 59
158
U1
GPMC_WAIT3
0
3.3
I
External indication of wait
Sys_ndmareq1
1
I
External DMA request 1
(system expansion). Level
(active low) or edge (falling)
selectable.
UART3_CTS_RCTX 2
I
UART3 Clear To Send
(input), Remote TX (output)
GPIO_65
4
IO
General-purpose IO 65
Safe_mode
7
159
X
GND
GND GND Ground
160
T1
GPMC_nBE1
0
3.3
O
Upper Byte Enable
GPIO_61
4
IO
General-purpose IO 61
Safe_mode
7
161
D25
MCBSP2_FSX
0
3.3
IO
Combined Frame
Synchronization
GPIO_116
4
IO
General-purpose IO 116
Safe_mode
7
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