TAM-3517 HARDWARE MANUAL rev B
July 3 2012, TechNexion
46
8.5
Serial Communication Interfaces – I
2
C Signals Description
The device contains multimaster high-speed (HS) inter-integrated circuit (I2C) controllers, each
of which provides an interface between a local host (LH), such as the microprocessor unit (MPU)
subsystem, and any I2C-bus-compatible device that connects through the I2C serial bus.
External components attached to the I2C bus can serially transmit and receive up to 8 bits of
data to and from the LH device through the 2-wire I2C interface.
Each HS I2C controller can be configured to act like a slave or master I2C-compatible device.
INTER-INTEGRATED CIRCUIT INTERFACE (I2C2)
SIGNAL NAME
DESCRIPTION
TYPE PIN TAM-3517
I2C2_SCL
I2C Master Serial clock. Output is open drain
IOD
23
I2C2_SDA
I2C Serial Bidirectional Data. Output is open
drain.
IOD
25
Note: These signals ha
ve a 4.7kΩ pull up resistor to 3.3 V
INTER-INTEGRATED CIRCUIT INTERFACE (I2C3)
SIGNAL NAME
DESCRIPTION
TYPE PIN TAM-3517
I2C3_SCL
I2C Master Serial clock. Output is open drain
IOD
38
I2C3_SDA
I2C Serial Bidirectional Data. Output is open
drain.
IOD
24
Note: These signals ha
ve a 4.7kΩ pull up resistor to 3.3 V
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