TS-5400 User’s Manual
Technologic Systems
10/31/03
25
17.4 Custom CMOS Configuration
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| System BIOS Setup - Custom Configuration |
| (C) 2000 General Software, Inc. All rights reserved |
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| Write Buffer :>Disabled | Cache Mode : Write-Through|
| CPU speed : 133 MHz | C8000-CFFFF maps to : PC/104 Bus |
| GP Bus Timings : Normal | PNP IO Port 0A79h : PCI Bus |
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| ^E/^X/<Tab> to select or +/- to modify |
<Esc> to return to main menu
Write Buffer
When write buffering is ‘Enabled’ the internal 16K byte L1 cache is used to allow zero wait
state writes to SDRAM . This setting defaults to Disabled and may be ‘Enabled’ by the user to optimize
performance.
Refer to the AMD Elan SC520 users manual section 11 for more information on write buffering.
Cache Mode
When set to Write-Through all writes to SDRAM will be updated in the internal cache as
well as the SDRAM. When set to Write-Back only the internal cache is updated, the cache controller will
determine when to flush cache to SDRAM. This setting defaults to ‘Write-Through’ and may be set to
‘Write-Back’ by the user to optimize performance.
Refer to the AMD Elan SC520 users manual section 8.4.2.2 for more information on cache mode.
CPU Speed
This will set the clock speed for the CPU core. This can be set to ‘100 MHz’ or ‘133 Mhz’.
The default speed for commercial temperature products is 133 MHz, the default for industrial
temperature products is 100 MHz. Changing this setting will not affect industrial temperature products
because they are specified by AMD with a maximum clock speed of 100 MHz.
C8000-CFFFF maps to
This setting allows a block of memory space to be mapped to either the PC/104
bus or the onboard SDRAM. This setting defaults to PC/104 bus.
GP Bus Timings
This setting allows the PC/104 bus timing to be stretched to allow slower devices to
operate. If Plug-N-Play boards are installed, or in the case of older PC/104 daughter cards setting this
entry to ‘Slow’ may be desired. This setting defaults to ‘Normal’ which has been tested and found to
work with the vast majority of boards.
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