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TS-5500 User’s Manual 

Technologic Systems 

 

10/31/03

 

29

PNP IO Port 0xA79

 This setting allows the Plug-N-Play configuration address to be mapped to the 

PC/104 bus. The I/O space above 0x400 is mapped to the PCI bus by default. If a Plug-N-Play device is 
connected to the PC/104 bus change this setting to ‘GP Bus’. 

AMD Elan SC520 Users Manual may be found at: 

http://www.embeddedx86.com/downloads/Components/520_user.pdf

 

 

20.5  Shadow Configuration 

+------------------------------------------------------------------------------+ 

|                                                                              | 

|                System BIOS Setup - Shadow/Cache Configuration                | 

|            (C) 2000 General Software, Inc. All rights reserved               | 

+---------------------------------------+--------------------------------------+ 

| Shadowing               :>Chipset     | Shadow 16KB ROM at C000 : Enabled    | 

| Shadow 16KB ROM at C400 : Enabled     | Shadow 16KB ROM at C800 : Disabled   | 

| Shadow 16KB ROM at CC00 : Disabled    | Shadow 16KB ROM at D000 : Disabled   | 

| Shadow 16KB ROM at D400 : Disabled    | Shadow 16KB ROM at D800 : Disabled   | 

| Shadow 16KB ROM at DC00 : Disabled    | Shadow 16KB ROM at E000 : Enabled    | 

| Shadow 16KB ROM at E400 : Enabled     | Shadow 16KB ROM at E800 : Enabled    | 

| Shadow 16KB ROM at EC00 : Enabled     | Shadow 64KB ROM at F000 : Enabled    | 

|                                       |                                      | 

|                                       |                                      | 

|                                       |                                      | 

|                                       |                                      | 

|                                       |                                      | 

|                                       |                                      | 

|                                       |                                      | 

|                                       |                                      | 

|                                       |                                      | 

|                                       |                                      | 

+---------------------------------------+--------------------------------------+ 

|                    ^E/^X/<Tab> to select or +/- to modify                    | 

                          <Esc> to return to main menu 

 

The Shadow Configuration menu allows BIOS extension ROMs to be copied to SDRAM in upper 
memory regions to reduce access times. Execution directly from ROM is significantly slower than 
executing from SDRAM. The region from C000-C7FF is usually reserved for the video BIOS extension in 
a PC compatible system, shadowing is enabled to optimize the video BIOS functions. The region from 
E000-FFFF contains the embedded BIOS code in the TS-5500. This region is shadowed to optimize 
BIOS code execution and to allow reprogramming of the BIOS while the BIOS is executing out of 
SDRAM. Other regions can be shadowed as required by specific applications. 

21  Feedback and Updates to the Manual 

To help our customers make the most of our products, we are continually making additional and 
updated resources available on the Technologic Systems web site (www.embeddedx86.com). These 
include manuals, application notes, programming examples, and updated software and firmware. Check 
in periodically to see what's new! 

When we are prioritizing work on these updated resources, feedback from customers (and prospective 
customers) is the number one influence. If you have questions, comments, or concerns about your TS-
5500 Embedded PC, 

please let us know

. Details for contacting us are listed in the front of this manual. 

Summary of Contents for TS-5500

Page 1: ...TS 5500 User s Manual...

Page 2: ...Hills AZ 85268 480 837 5200 FAX 837 5300 info embeddedx86 com http www embeddedx86 com This revision of the manual is dated October 22 2003 All modifications from previous versions are listed in the a...

Page 3: ...t the RMA number on the outside of the package This limited warranty does not cover damages resulting from lighting or other power surges misuse abuse abnormal conditions of operation or attempts to a...

Page 4: ...KEYPAD SUPPORT 13 10 THE 10 100 BASE T ETHERNET PORT 14 10 1 LINUX TCP IP configuration 14 10 2 DOS TCP IP configuration Packet Driver and WATTCP 15 10 3 WATTCP CFG configuration file 15 10 4 DOS TCP...

Page 5: ...ENDIX A BOARD DIAGRAM AND DIMENSIONS 30 APPENDIX B OPERATING CONDITIONS 30 APPENDIX C SYSTEM MEMORY MAP 31 APPENDIX D SYSTEM I O MAP 32 APPENDIX E BIOS INTERRUPT FUNCTIONS 33 Int 15h Function B000h Te...

Page 6: ...airly short This is because for the most part the TS 5500 is a standard x86 based PC compatible computer and there are hundreds of books about writing software for the PC platform The primary purpose...

Page 7: ...The remainder of the Flash memory 1920 KB is configured as two solid state disk SSD drives appearing as drive A and drive B Drive A uses 896 KB of Flash memory while drive B uses the remaining 1024 K...

Page 8: ...his Note The TS 5500 always needs to be powered off before swapping CF cards 4 5 Non Volatile SRAM The 32 pin socket can also optionally hold 32 KB of Non volatile SRAM memory This behaves exactly lik...

Page 9: ...In RTS mode the serial port RTS signal controls the RS 485 transmitter receiver See Automatic mode below When RTS is asserted true the RS 485 transmitter is enabled and the receiver disabled When RTS...

Page 10: ...the COM3 UART This circuit automatically turns on off the RS 485 transceiver at the correct times This only requires the TIMER2 to be initialized once based on baud rate and data format and bit 7 at...

Page 11: ...inputs In all cases when a control bit is a 1 it is setting the corresponding DIO lines to be Outputs while a 0 sets them to be Inputs All control bits at I O location Hex 7A are initialized at reset...

Page 12: ...1 LCD_RS is connected to IRQ1 allowing this port to trigger an interrupt All digital outputs on this port can source 4 mA or sink 8 mA and have logic swings between 3 3V and ground The digital inputs...

Page 13: ...ted If the ADC completion bit is not true after 50 S the routine exits with an error condition Int 15h Function B050h ENTRY AX B050h BL Value to write into A D Control register See Table 6 EXIT CY 0 n...

Page 14: ...ix Keypad Support The DIO2 port signals DIO2_0 through DIO2_7 may be configured to support a 4 x 4 matrix keypad When enabled BIOS firmware performs all the work making the matrix keypad appear as a s...

Page 15: ...a kernel module If the Technologic Systems kernel is used the DM9102A driver is built into the kernel The settings stored in EEPROM on the TS 5500 are used to configure the DM9102A The TCP IP settings...

Page 16: ...load a packet driver for the Ethernet interface DM9PCIPD 0X60 The TCP IP settings for the WATTCP code are stored in the WATTCP CFG configuration file in the A ETHERNET directory this file must be mod...

Page 17: ...IRQ7 is used for the PC Card interrupt 11 2 Software Linux support only Card Services for Linux is a complete PCMCIA support package It includes a set of loadable kernel modules that implement a versi...

Page 18: ...supports speeds up to 12 Mbps under USB Rev 1 1 The TS 5500 provides two USB ports with individual power switching and over current shutdown The USB controller is connected as a standard PCI device on...

Page 19: ...letely self contained module that includes a Motorola 146818 compatible clock chip the 32 768 kHz crystal the lithium battery and 114 bytes of battery backed CMOS RAM It is guaranteed to maintain cloc...

Page 20: ...tional failsafe feature In order to load the WDTMRCTL register a specific sequence of three word writes is required A 3333h followed by CCCCh followed by the value to be loaded into the WDTMRCTL regis...

Page 21: ...not turn on at all when power is applied the most likely problem is the power supply Check that the 5V and GND connections are not reversed A diode protects the board against damage in such a situati...

Page 22: ...y the 16 bit version of the PC 104 bus We have found this allows the support of the vast majority of PC 104 boards including all of the above mentioned examples IRQ3 and IRQ4 are typically used by COM...

Page 23: ...7 3 Zmodem Downloads Using the Zmodem protocol to send files to and from the TS 5500 is simple and straightforward The only requirement is a terminal emulation program that supports Zmodem and virtual...

Page 24: ...ur application code the debugger will automatically be invoked To resume type the G command to GO or continue on with the rest of initialization From DOS ROM by typing INT3 at the command prompt If th...

Page 25: ...for display and keyboard input which are rerouted to the serial port Any program that accesses the video or keyboard hardware directly will not work Keyboard redirection is limited simply because mos...

Page 26: ...the CMOS memory on every boot any changes will be lost Basic CMOS Configuration Setup disk drives drive mapping boot order misc Custom Configuration Setup custom features for Technologic Systems board...

Page 27: ...2 Not installed Ext Floppy 1 Not installed Ide 3 Not installed 31MB E X Tab to select or to modify Esc to return to main menu The factory defaults shown will first attempt to boot from Compact Flash...

Page 28: ...5500 User s Manual Technologic Systems 10 31 03 27 Master DIP switch 5 off change the IDE DRIVE GEOMETRY for Ide 2 to AUTOCONFIG PHYSICAL and change the DRIVE ASSIGNMENT for Drive D to Ide 2 Sec Mast...

Page 29: ...ine when to flush cache to SDRAM This setting defaults to Write Through and may be set to Write Back by the user to optimize performance Refer to the AMD Elan SC520 users manual section 8 4 2 2 for mo...

Page 30: ...nu allows BIOS extension ROMs to be copied to SDRAM in upper memory regions to reduce access times Execution directly from ROM is significantly slower than executing from SDRAM The region from C000 C7...

Page 31: ...logic Systems 10 31 03 30 Appendix A Board Diagram and Dimensions Appendix B Operating Conditions Operating Temperature 0 to 70 C Extended temperature range is optional Operating Humidity 0 to 90 rela...

Page 32: ...5M or 31M or 63M BIOS Shadow RAM E0000h 896k 128k Elan520 Configuration Registers DF000h 892k 4k PC 104 Bus D2000h 840k 52k DiskOnChip or NV SRAM D0000h 832k 8k 32k PC 104 Bus or SDRAM user configurab...

Page 33: ...ipherals 074h 07Fh DIO and Control registers 072h 073h LCD port 070h 071h RTC and CMOS memory 060h 064h Keyboard Controller TS 9500 000h 05Fh Internal Elan520 peripherals Table 11 TS 5500 I O Map I O...

Page 34: ...XIT CY 0 carry flag AH 0 AL SP_VERSION For standard versions of the BIOS this is 0 An SP number is assigned when custom modifications are made to the BIOS for a client and it is returned in this regis...

Page 35: ...the following 0 9 A D and returns the scan code for Carriage Return A custom translation table is 16 words long where each word is a scan code ASCII pair for a key Information on scan codes can be fo...

Page 36: ...et 03 ADC option not present I O 7Dh bit 0 0 04 Hardware error A D timeout BX A D Conversion value The ADC automatically sign extends the result to the full 16 bits in bipolar mode and masks the upper...

Page 37: ...The baud rate clock for each COM port is controlled by bit 2 in the UART Control Register UART1CTL and UART2CTL UART1CTL DFCC0h UART2CTL DFCC4h Clearing bit 2 to a 0 will change the clock to the 10X...

Page 38: ...heet http www embeddedx86 com downloads 12887 pdf Intel 386EX User s Guide http developer intel com design intarch manuals 272485 htm Maxim Integrated Products http www maxim ic com National Semicondu...

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