28
FO 935 ETH
INFO various causes (READ)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
--
--
--
-
-
-
-
(*) RESET
(R) has
taken place
COMMANDS (WRITE)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
--
--
--
-
-
Reset
Reg.CPU_E
RROR
(*) Reset
historical
data
(*)
ResetBIT:R
ESET has
taken place
CHn SETTING
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
--
--
--
--
--
FAN2
FAN1
CAN_enabled
CHn STATUS
CHn STORY
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
--
TRIP
ALARM
--
--
FLT
FOC
FCC
RELAY STATUS (coil energising status)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
--
--
--
FAULT
Relay 1=ON
TRIP Relay
1=ON
ALARM
Relay 1=ON
FAN_2
Relay
1=ON
FAN_1
Relay 1=ON
CPU ERROR
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
--
--
TEC ERR
--
FO ERR
FLT
--
--
ECH
CPU SETTING
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
--
TRIP
ALARM
FAN_2
FAN_1
FLT
FOC
FCC
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
--
--
--
Failsafe fault
Failsafe trip
Failsafe
alarm
--
--
REGISTERS NOTES