Theory
of Operation
—DM 5010
Table
4-5
ADDRESS DECODE MEMORY MAP
Starting
Hexadecimal
Address
Signal
or
Enable
Size
(Decimal)
0000
ERAM
1k
0400
£Sw
I
1k
0800
|
EMISC
'
1k
OCOO
ERR
1k
1000
1000-17FF
NOT
USED
2k
1B00
ECMOS
1k
1C00
RC
1k
2000
EG
p
TB
1k
2400
sa
STD
p
1k
2800
1
RD
1k
2C0Q
0 RD
1k
3000
ADVANCE
1k
3400
3
1/2
1k
3800
4
1/2
1k
3C00
TRIG
1k
4000
4000-BFFF
NOT USED
32k
COOO
EPROMC
4k
D000
EPROMD
4k
EOOO
EPROME
4k
F000
EPROM
F
4k
LOGIC
The Logic stage works
in conjunction with the Address
Decode
circuitry to generate process control signals re
quired
by the
A/D
conversion circuitry.
The
set-reset latches, U1720A and U1720B, allow the
microprocessor
to set
signal levels simply by addressing
the
function via the Address Decode
circuitry. Table 4-4 shows
the block of addresses that the
microprocessor uses to set
or
reset the
RD (Range Data) or 3 1/2 (measurement resolu
tion) signal
lines.
DATA
BUS BUFFER <7>
The Data
Bus Buffer, U1435, provides bidirectional
buffering of instructions
and data
on the data bus.
Depend
ing
on the instruction being executed, the microprocessor
either
outputs data onto the data bus or reads from the bus
by
controlling
buffer direction via its R/W (read-write) control
line.
NOP BUFFER <7>
By making
the microprocessor execute
a continuous se
ries of NOP (no-operation) instructions, much of the micro
processor
kernel
may be exercised and verified apart from
devices that may be malfunctioning on the
Data Bus.
Mov
ing
P1425 to its NOP position tri-states (disables) the nor
mal
Data Bus Buffer U1435 and, in its place, enables the
NOP Buffer U1430. This device inverts its
hardwired inputs
and forces
a NOP
instruction (00000001) into the processor
with
each clock to make the processor “do
nothing’.
In reali
ty,
the
microprocessor sequentially increments through its
entire
address field,
exercising many devices connected to
the
address
bus in a repeatable and
predictable fashion.
This allows for verification of
the
kernel and may be used as
an aid in
distinguishing
data-related problems
from
hard
ware problems when troubleshooting.
ROM
<8>
The ROM contains the
operational
firmware for the
DM
5010.
Data is read from the ROM stage one byte at a
time from
any
of 16k locations as
addressed by the micro
processor.
The Address Decode stage
described earlier en
ables
only one
of the
four ROM IC's when the ROM is to be
read. The
12 LSBs of the buffered address bus select one of
the
possible 4k
bytes
stored
in the enabled IC to be output
to
the
Data Bus where it is read by the microprocessor.
RAM <8>
The RAM stage,
U1600
and U1505, consists of two 1 k X
4-bit RAM ICs and a small amount of enable logic. When the
Address
Decode circuitry
detects an address within the
alotted
RAM
space,
it
sets the
ERAM line connected to the
RAM
CS (Chip Select) inputs low. This enables data to be
read
from or
written to RAM, depending on the level of the
WE
(Write
Enable) pins.
The RAM
outputs
the data addressed by the buffered
address bits BA0-BA9 when
ERAM is low and WE is high.
Data may be written to the addressed
location only when
ADD
JAN
1982
4-23
Summary of Contents for DM 5010
Page 14: ...DM 5010 2994 00 DM 5010 Programmable Digital Multimeter xii ADD JUL 1986...
Page 27: ...Operating Instructions DM 5010 2994 03 Fig 2 3 DM 5010 front panel controls and connectors 2 3...
Page 38: ......
Page 134: ......
Page 208: ......
Page 222: ......
Page 250: ......
Page 251: ...Section 8 DM 5010 OPTIONS No options are available 8 1...
Page 252: ......
Page 270: ......
Page 272: ...DM 5010 2994 37 Fig 10 2 Location of DM 5010 adjustments and test points...
Page 273: ......
Page 274: ......
Page 275: ......
Page 276: ...DM 5010 2994 112 DM 5010 BLOCK DIAGRAM...
Page 281: ......
Page 282: ......
Page 291: ......
Page 293: ......
Page 294: ......
Page 297: ......
Page 298: ......
Page 303: ......
Page 304: ...I...
Page 305: ......
Page 310: ......
Page 311: ......
Page 315: ......
Page 318: ......
Page 321: ......
Page 323: ......
Page 326: ......
Page 332: ...2994 57...
Page 334: ......
Page 335: ......
Page 336: ......
Page 337: ...63 REV JUN 1986...
Page 338: ...FIG 1 EXPLODED DM 5010...
Page 339: ......
Page 340: ......
Page 341: ......
Page 347: ......