Theory of Operation
—DM 5010
There
are
16 register locations accessible to the micro
processor via the
address bus and data bus.
These regis
ters
store and
transfer the control information for the
various
IC functions as well as IC status and data transfer
information.
The
16 registers (eight read-only and eight
write-only)
are addressed by
the R/W line along with
buffered
address bits BA0-BA2. Data is written into the
write
registers or read from
the read registers via the data
bus coincident
with
the BΦ
2
clock.
The
GPIB IC can execute instructions from both the
microprocessor data bus and from the General Purpose In
terface Bus. As these commands are executed, the
various
GPIB control and
handshake sequences are automatically
performed by the
GPIB IC, including the proper direction of
data transfer on
the GPIB (controlled by
T/R).
Command
sequences received via the GPIB usually re
quire
that normal
microprocessor operation
be interrupted.
An
IRQ (Interrupt Request) to
the
microprocessor is gener
ated by the GPIB IC when such conditions arise.
FRONT-PANEL
CONTROL
<9>
The
Front-Panel Control stage
consists primarily of
U1605,
a
specialized IC designed to scan the
Front-Panel
Switches
and control
the
Front-Panel Display. It provides
scanning and reading functions for the various Front-Panel
Switches
as well as
the storage
and multiplexing functions
required
for the Front-Panel
Display.
After the PON
reset at power up, a scanning sequence
begins
that
checks the Front-Panel Switches for
closures.The
SC1-SC3
(Scan Column
1-3) lines are the out
puts of
a free-running binary counter and are later decoded
by
the Front-Panel
Drive circuitry (diagram 11) to scan the
eight columns of the Front-Panel Switches matrix. As each
column
of
the
matrix is
set
low (one
at a time), the five rows
of
the
matrix are checked to see
if
a
closure is present at the
corresponding
switch. If a closure is detected, a unique ad
dress
identifying
the
switch is written into a temporary stor
age register within U1
605.
When the microprocessor
executes
its front-panel read
routine, the register is
read
via
the data
bus
and the instrument function is changed under
firmware
control
to reflect the depressed switch. All time
relationships for the front-panel
scanning
are derived from
the Bo2
clock.
Data to
be displayed by the Front-Panel Display is writ
ten
from the microprocessor into eight 8-bit storage regis
ters
internal
to U1605 via
the data bus. Each
bit,
when low,
corresponds to an
illuminated LED, either
in the seven seg
ment displays
or the individual status LEDs. The micro
processor formats all numeric and status information before
writing
it to U1605 so that meaningful displays will
result.
The Display is
scanned
in a manner similar to that of the
switch matrix
described above. As U1605 performs its con
tinuous
scanning functions, each of the seven-segment dis
plays or columns of status LEDs
are enabled one
at a time,
as
determined
by the
SC1-SC3 output
lines from
U1605 and
the
Front-Panel
Drive circuitry
on diagram 11. As each new
column
or
digit is
enabled, the contents of the correspond
ing display register
are output onto
the CD1-CD8 (cathode
drive
1-8) lines. This is
the
display information previously
stored by the microprocessor. The appropriate LEDs are
turned
on to form either a
decimal digit or to light the
status
indicators.
All front-panel
related data transfers occur via the
Data
Bus
and are enabled by a low EFP (Enable Front Panel)
from
the Address
Decode circuitry. Writing display informa
tion to U1605
is
enabled by a
low VW (Valid Write) to the IC
and occurs coincident with the B Φ2 clock. Integrated circuit
U1630 controls the reading of the Front-Panel Switches reg
isters.
Reading occurs
coincident with the BΦ2 clock and
one
of two registers may
be read as selected by
BA0,
the
least significant bit of the address bus.
MAIN INTERCONNECT <$>
The
Main Interconnect is
a printed circuit board that pro
vides
most of the interconnection for the
various boards of
the
DM
5010.
Signal origin
is indicated
by an
arrow pointing
away from the
board connector on which the signal is gener
ated.
The
Main Interconnect
also provides guard and
ground shielding.
FRONT-PANEL
DRIVE <£>
The Front-Panel Drive stage consists of a
1 -of-8 decod
er,
current
buffering circuitry, and a front-panel regulator.
The front-panel
regulator, U1720,
and its associated com
ponents regulate the +8 V supply from the
power module
down to
+5 V to provide power for the front-panel circuitry.
By using
a
separate
+5 V supply for the front-panel circuit
ry, switching noise and transients generated by Front-Panel
Switches
do not affect
operation of
the rest of the
instrument.
The decoder, U1040, converts the binary scanning code
from
the
Front-Panel
Control IC to the eight individual
lines
required
to scan the Front-Panel Switches and the Front-
Panel
Display, as explained in the Front-Panel Control de
scription.
The buffering
provides current drive levels as
required
by the
switch
matrix
and LED displays.
ADD
JAN
1982
4-29
Summary of Contents for DM 5010
Page 14: ...DM 5010 2994 00 DM 5010 Programmable Digital Multimeter xii ADD JUL 1986...
Page 27: ...Operating Instructions DM 5010 2994 03 Fig 2 3 DM 5010 front panel controls and connectors 2 3...
Page 38: ......
Page 134: ......
Page 208: ......
Page 222: ......
Page 250: ......
Page 251: ...Section 8 DM 5010 OPTIONS No options are available 8 1...
Page 252: ......
Page 270: ......
Page 272: ...DM 5010 2994 37 Fig 10 2 Location of DM 5010 adjustments and test points...
Page 273: ......
Page 274: ......
Page 275: ......
Page 276: ...DM 5010 2994 112 DM 5010 BLOCK DIAGRAM...
Page 281: ......
Page 282: ......
Page 291: ......
Page 293: ......
Page 294: ......
Page 297: ......
Page 298: ......
Page 303: ......
Page 304: ...I...
Page 305: ......
Page 310: ......
Page 311: ......
Page 315: ......
Page 318: ......
Page 321: ......
Page 323: ......
Page 326: ......
Page 332: ...2994 57...
Page 334: ......
Page 335: ......
Page 336: ......
Page 337: ...63 REV JUN 1986...
Page 338: ...FIG 1 EXPLODED DM 5010...
Page 339: ......
Page 340: ......
Page 341: ......
Page 347: ......