REMOTE CONTROL
183
Bit Definition for the Standard Event
Register
Bit number
Decimal Value Definition
0 Operation
Complete Bit
1
The *OPC command will set this bit
when all overlapping operations
have completed (including the *OPC
command itself).
1 Not used
2
Not used, returns “0”
2 Query Error
4
The instrument tried to read the
error queue when the queue was
empty or the queue was read
before a new command was given
or the input/output buffers are full.
3 Device Error
8
A self-test, calibration or other
device-specific error.
4 Execution Error 16
An execution error.
5 Command Error 32
A command syntax error.
6 Not used
64
Not used, return 0.
7 Power on
128
This bit is set if the power supply
has been reset from the last time
you read the event register.
The following will clear the standard event register:
The *CLS command is executed.
The *ESR? command is used to query the event
register.
The following will clear the standard event enable register.
The *ESE command is executed.
Summary of Contents for T3PS13206P
Page 1: ... ...
Page 106: ...T3PSX3200P Series User Manual 106 Register Commands OPC 187 OPC 187 ...
Page 177: ...REMOTE CONTROL 177 Example SAV 1 Recalls the setting stored in memory 2 STATE02 ...
Page 185: ...REMOTE CONTROL 185 Example STB Returns 81 if the status byte register is set to 0101 0001 ...
Page 196: ...T3PSX3200P Series User Manual 196 Between chassis and DC power cord 30MΩ or above DC 500V ...
Page 197: ... 0 0 0 1 2 3 4 5 6 7 8 8 9 3 3 3 45 6 990 0 0 9 0 0 0 9 0 0 0 0 9 7 7 88 8 1 931711 RevB ...