S42
Hardware User Guide
1VV0301303 Rev. 11
Page 20 of 85
2021-05-06
Not Subject to NDA
UART-TXD
GND
UART-RXD
IUC_IN# / CTS#
UART-RXD
UART-TXD
B
lu
eM
o
d
+
Sx
H
o
st
RTS#
CTS#
IUC_OUT# / RTS#
IUR_OUT#
IUR_IN#
Figure 8: UART Interface without UICP Signals (5-wire incl. GND)
Note/Tip: To support operation with the Sx pin CTS# left
open, a pulldown resistor (typ. 13k
Ω
) is programmed to this pin if
UICP is disabled.
Therefore, if AT+SYSTEMOFF is issued while UICP is disabled, it is
necessary that the host keeps CTS# at logic low or leaves this pin
floating.
Otherwise the supply current drawn in the deep sleep mode
increases by VSUP/13k
Ω
, which would be at 3V 231µA, 770 times the
expected 0,3µA. This would reduce the lifetime of a coin cell
significantly.
3.3.2.
4-Wire Serial Interface
If the host in question is sufficiently fast, a 4-wire (incl. GND) scheme may be successful.
Connect the serial lines UART-RXD, UART-TXD as well as UART-RTS# and GND; leave
UART-CTS# open. The host is required to stop sending data within a short time after de-
assertion of UART-RTS# (there is room for up to 4 more characters at the time RTS#
drops).
