GL865 Hardware User Guide
1vv0300910 Rev.1 – 2011-07-22
Reproduction forbidden without Telit Communications S.p.A. written authorization - All Rights Reserved
page 56 of 79
Also the UART ‘s control flow pins can be ubable as GPI/O.
Pin Signal I/O
Function
Type
Input /
output
current
Default
State
ON_OFF
state
State
during
Reset
Note
1
GPO_A
O
Configurable
GPO
CMOS
2.8V
1uA/1mA
INPUT
0
0
Alternate
function
C109/DCD
2
GPO_B
O
Configurable
GPO
CMOS
2.8V
1uA/1mA
INPUT
0
0
Alternate
function
C125/RING
3
GPO_C
O
Configurable
GPO
CMOS
2.8V
1uA/1mA
INPUT
0
0
Alternate
function
C107/DSR
4
GPI_E
I
Configurable
GPI
CMOS
2.8V
1uA/1mA
INPUT
0
0
Alternate
function
C108/DTR
5
GPI_F
I
Configurable
GPI
CMOS
2.8V
1uA/1mA
INPUT
0
0
Alternate
function
C105/RTS
6
GPO_D
O
Configurable
GPO
CMOS
2.8V
1uA/1mA
INPUT
0
0
Alternate
function
C106/CTS
11.1.
GPIO Logic levels
Where not specifically stated, all the interface circuits work
at 2.8V CMOS logic levels.
The following table shows the logic level specifications used in
the
GL865
interface circuits:
Absolute Maximum Ratings -Not Functional
Parameter
Min
Max
Input level on any
digital pin
when on (CMOS 2.8)
-0.3V
+3.1V
Input level on any
digital pin
when on (CMOS 1.8)
-0.3V
+2.1V
Input voltage on
analog pins
when on
-0.3V
+3.0V
Operating Range - Interface levels (2.8V CMOS)
Level
Min
Max