Section 11 TECHNICAL INFORMATION
209
The output stage uses the ubiquitous NE5532 op- amps to create, and present to the
XLR output connectors, a differential output. The output is passed through L1- L4 which
are pi- filters designed to prevent RF from coming into the Zephyr, and digital clock
noise from exiting. For highest fidelity AC coupling only happens once in the output
path- at C35 and C36- and these are electrolytic types as currently favored by audio
“tweeks”.
A very high- quality headphone amplifier is made from two LM6321 buffers and the
associated op- amp. U22 is a digitally adjusted potentiometer (digipot) which under
control of the CPU allows headphone gain adjustment. The digipot is placed in the op-
amp’s shunt feedback path, so as not to reduce headroom- the pots operate from the ±
5 Vdc power supply rails whereas the audio path is limited only by the ± 12 Vdc rails.
Motherboard A-F: Phone CODEC
The phone CODEC, U21 is used when standard voice- grade calls are being made
via the internal ISDN terminal adapter. This chip has both A/D and D/A as well as input
and output low- pass filters. Send audio to the CODEC must originate from the analog
inputs. A master clock at 2.048 MHz is applied at pin 27. A 2.028 MHz clock is also
applied to pins 2 and 19 as the receive and transmit bit clocks, respectively. The audio,
in digital form, enters at pin 15 and leaves at pin 18. The signals at these points are the
“PCM highway” format often used in digital telephone systems. These have 32 time
slots, each of eight bits audio. The frame sync applied to pins 3 and 16 mark the
beginning of the 32 slots. In this application, audio is to be found in the third and fourth
slots – ISDN channel B1 in slot 2, and channel B2 in slot 3.
Control of the CODEC is obtained by the CPU signals which are applied to pins
23 - 26. This is a serial control signal which is used for muting, slot selection, etc.
U27 is a specialized chip which provides additional filtering and buffering.
It creates a balanced output for the front panels, which get the phone audio
for presentation at the internal loudspeaker. This line is RF filtered by L9,10.
Motherboard A-F: PLL
The system requires a very high- quality PLL
(Phase Locked Loop)
in order to ensure that
no significant jitter is passed from the network to the A/D and D/A converters. (In
digital audio systems, clock jitter translates to audio noise.) U42 is a precision voltage
controlled oscillator, which is buffered by U45 and sent to the XILINX for distribution to
the rest of the system. The two signals PHASEC- VCO and PHASEC- REF are compared
in U41 and a DC control voltage is generated to set the VCO frequency at pin 10.
PHASEC- VCO is derived from the VCO oscillator, divided within the XILINX. PHASEC-
REF is a divided- down version of the network clock. The PLL time- constant is set by
R80 and C50.
U41 pin 1 is an output which is used to generate a locked/unlocked signal sent to the
CPU. This is applied to a “digital time- constant” within the CPU software to drive the
front panel SYNC LED (located near the SEND meter).
A small three- terminal regulator provides clean DC at 7.6V to U41.
Proper operation can be confirmed three ways:
Summary of Contents for Zephyr
Page 13: ...Table of Contents 13 SECTION 1 QUICK RESULTS ...
Page 26: ...Section 2 INTRODUCTION 26 This page intentially left blank ...
Page 27: ...Section 2 INTRODUCTION 27 SECTION 2 INTRODUCTION ...
Page 38: ...Section 2 INTRODUCTION 38 This page intentionally left blank ...
Page 39: ...39 SECTION 3 ZEPHYR AT A GLANCE ...
Page 52: ...Section 4 INSTALLATION BASIC OPERATION 52 This page intentionally left blank ...
Page 53: ...Section 4 INSTALLATION BASIC OP 53 SECTION 4 INSTALLATION BASIC OPERATION ...
Page 84: ...Section 4 INSTALLATION BASIC OPERATION 84 ...
Page 85: ...Section 5 ISDN 85 SECTION 5 ISDN ...
Page 105: ...Section 6 NON ISDN NETWORKS 105 SECTION 7 AUDIO CODING ...
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Page 119: ...Section 8 DETAILED MENU REFERENCE 119 SECTION 8 DETAILED MENU REFERENCE ...
Page 157: ...Section 9 REMOTE CONTROL 157 SECTION 9 REMOTE CONTROL ...
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Page 177: ...Section 10 ADVANCED PROBLEM SOLVING 177 SECTION 10 ADVANCED PROBLEM SOLVING ...
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Page 197: ...Section 11 TECHNICAL INFORMATION 197 SECTION 11 DETAILED TECHNICAL INFORMATION ...
Page 219: ...Section 12 SCHEMATICS 219 SECTION 12 SCHEMATICS ...
Page 221: ...Section 13 MANUFACTURER S DATA SHEETS 221 SECTION 13 MANUFACTURER S DATA SHEETS ...
Page 223: ...Section 14 SPECIFICATIONS WARRANTY 223 SECTION 14 SPECIFICATIONS AND WARRANTY ...
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Page 229: ...Section 15 APPENDICES 229 SECTION 15 APPENDICES ...