2
Figure 1-1 The VEEK-MT-C5SOC board overview
The key features of the board are listed below:
1
1
.
.
1
1
C
C
y
y
c
c
l
l
o
o
n
n
e
e
V
V
S
S
X
X
S
S
o
o
C
C
D
D
e
e
v
v
e
e
l
l
o
o
p
p
m
m
e
e
n
n
t
t
B
B
o
o
a
a
r
r
d
d
••••
Cyclone V SX SoC—5CSXFC6D6F31C6N
o
110K LEs, 41509 ALMs
o
5140 M10K memory blocks
o
224 18x18 Multiplier
o
6 FPGA PLLs and 3 HPS PLLs.
••••
Configuration Sources
o
Active Serial (AS) x1 or x4 configuration (EPCQ256SI16N)
o
MAX® V CPLD (5M2210ZF256I5N) in a 256-pin FBGA package as the System
Controller
o
Flash fast passive parallel (FPP) configuration
o
MAX II CPLD (EPM570GM100) as part of the embedded USB-BlasterTM II for
use with the Quartus® II Programmer
••••
Memory Devices
o
One 1,024-Mbyte (MB) HPS DDR3 SDRAM with error correction code (ECC)
support
o
One 1,024-MB FPGA DDR3 SDRAM
o
One 256-Megabit (Mb) quad serial peripheral interface (QSPI) flash
o
One 512-Mb CFI flash
o
One 32-Kb I2