71M6521
Demo Board User’s Manual
Page: 106 of 111
© 2005-2009 TERIDIAN Semiconductor Corporation
Revision 2.18
4.13 TERIDIAN 71M6521 PIN-OUT INFORMATION
Power/Ground/NC Pins
:
Name
Type
Description
GNDA
P
Analog ground: This pin should be connected directly to the ground plane.
GNDD
P
Digital ground: This pin should be connected directly to the ground plane.
V3P3SYS
P
System 3.3V supply. This pin should be connected to a 3.3V power supply.
V3P3A
P
Analog power supply: A 3.3V power supply should be connected to this pin. This power supply
must be the same voltage as V3P3SYS,.
V3P3D
P
Auxiliary voltage output of the chip, controlled by the internal 3.3V selection switch. In mission
mode, this pin is internally connected to V3P3SYS. In BROWNOUT mode, it is internally
connected to VBAT. This pin is floating in LCD and sleep modes.
VBAT
P
Battery backup power supply. A battery or super-capacitor is to be connected between VBAT
and GNDD. If no battery is used, connect VBAT to V3P3SYS.
V2P5
O
Output of the internal 2.5V regulator. A 0.1µF capacitor to GNDA should be connected to this
pin.
Analog Pins:
Name
Type
Description
IA, IB
I
Line Current Sense Inputs: These pins are voltage inputs to the internal A/D converter. Typically,
they are connected to the outputs of current sensors.
Unused pins must be connected to
V3P3A.
VA, VB
I
Line Voltage Sense Inputs: These pins are voltage inputs to the internal A/D converter. Typically,
they are connected to the outputs of resistor dividers.
Unused pins must be connected to
V3P3A or tied to the voltage sense input that is used.
V1
I
Comparator Input: This pin is a voltage input to the internal comparator. The voltage applied to
the pin is compared to an internal BIAS voltage (1.6V). If the input voltage is above the refer-
ence, the comparator output will be high (1). If the comparator output is low, a voltage fault will
occur. A 0.1µF capacitor to GNDA should be connected to this pin.
VREF
O
Voltage Reference for the ADC. This pin is normally disabled by setting the
VREF_CAL
bit in the
I/O RAM and can then be left unconnected. If enabled, a 0.1µF capacitor to GNDA should be
connected.
XIN
XOUT
I
Crystal Inputs: A 32kHz crystal should be connected across these pins. Typically, a 27pF
capacitor is also connected from each pin to GNDA. It is important to minimize the capacitance
between these pins. See the crystal manufacturer datasheet for details.
Table 4-5: 71M6521 Pin Description 1/2
