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Summary of Contents for 5-6K

Page 1: ...P5 and JP6 4 6 EVM Analog I O Connections J10 and J12 4 7 Parallel Control Connections 5 8 Parallel EVM Clocking Options via J14 6 9 External Interrupt Source via J13 6 10 Parallel Control Connections 7 11 Bill of Material 8 The 5 6K Interface Board provides data converter customers with flexibility for the evaluation of data acquisition products from Texas Instruments The Interface Board maintain...

Page 2: ...11 3 3 V 3 7 V Max Digital Voltage power to digital logic ADCs DACs etc The signal conditioning sites provide a 20 pin analog I O header and a 6 pin header for the analog power supply connections The analog I O connectors J3 and J4 provide up to eight single ended or four differential channels to from the data converter External reference voltages can also be applied to the data converter through ...

Page 3: ...are 20 pin headers that provide access to the serial interface signals defined in the TMS320 Cross Platform Daughtercard Specification SPRA711 These signals are based on the multichannel buffered serial port McBSP interface found on most Texas Instruments DSPs Table 4 shows the standard serial connector pinout Table 4 Digital I O Connections J15 and J16 Signal 1 Signal 1 Pin Number Site 1 J15 Site...

Page 4: ... and JP6 are provided each with the same pinout JP5 services serial Site 2 while JP6 services serial Site 1 Table 5 shows the power connector voltages supplied to the EVM Table 5 EVM Power Connections JP5 and JP6 Signal Pin Number Signal VA 1 2 VA 5VA 3 4 5VA DGND 5 6 AGND 1 8VD 7 8 VD1 3 3VD 9 10 5VD As mentioned previously the analog I O connectors act as pass through connectors to the signal co...

Page 5: ...l DC_CSx 1 2 DGND WR R W 3 4 DGND RD 5 6 DGND EVM_A0 7 8 DGND EVM_A1 9 10 DGND EVM_A2 11 12 DGND EVM_A3 13 14 DGND GPIO SPARE NC 15 16 DGND TOUTa 17 18 DGND INT 19 20 DGND DC_CSx is defined in the TMS320 Cross Platform Daughtercard Specification This signal is intended to act as a chip select to the EVM not necessarily the actual data converter being evaluated Carefully read the documentation that...

Page 6: ...J13 1 Shunt on Pins Connects To Rev A PWB Rev B PWB 1 2 DC_INTa DC_INTb 3 4 DC_INTb DC_INTb 5 6 DC_INTc DC_INTd 7 8 DC_INTd DC_INTd 1 External interrupts shown in this table are based on the TMS320C6711 DSK Jumper W7 on the 5 6K Interface Board revision B expands the interrupt capabilities of certain data converter EVMs W7 controls the signal applied to J13 via single gate inverter U7 When a shunt...

Page 7: ...ws the parallel data bus connections Table 10 Parallel Control Connections Signal Pin Number Signal D0 1 2 DGND D1 3 4 DGND D2 5 6 DGND D3 7 8 DGND D4 9 10 DGND D5 11 12 DGND D6 13 14 DGND D7 15 16 DGND D8 17 18 DGND D9 19 20 DGND D10 21 22 DGND D11 23 24 DGND D12 25 26 DGND D13 27 28 DGND D14 29 30 DGND D15 31 32 DGND D16 33 34 DGND D17 35 36 DGND D18 37 38 DGND D19 39 40 DGND D20 41 42 DGND D21 ...

Page 8: ... J19 J20 80 Pin SMT connector Samtec TFM 140 32 S D LC 10 4 JP1 JP2 JP3 JP4 3 Pin Dual Row TH Header 6 Pos Samtec TSW 103 07 L D 11 2 JP5 JP6 5 Pin Dual Row SMT Header 10 Pos Samtec TSM 105 01 T DV P 12 2 R1 R3 10K ohm 0805 1W Resistor Yageo America 9C08052A1002JLHFT 13 1 R2 49 9 ohm 0805 1 1W Resistor Yageo America 9C08052A49R9FKHFT 14 2 R5 R7 470 ohm 8 Element Array CTS 742C163471JTR 15 2 SW1 SW...

Page 9: ... J10 Digital I O J16 Power JP6 Analog I O J12 Digital I O J15 Power JP5 Analog I O J4 Power JP2 or JP4 Analog I O J10 ADC s or J12 DAC s Parallel Data Bus J17 Parallel Control J18 Power JP5 Analog I O J3 Power JP1 or JP3 Assy Revison Label Indicates Jumper Defaults ...

Page 10: ... 4 40 x inch 3 places optional ...

Page 11: ...TOUTb DC_D0 DC_D1 DC_D2 DC_D3 DC_D4 DC_D5 DC_D6 DC_D7 DC_D8 DC_D9 DC_D10 DC_D11 DC_D12 DC_D13 DC_D14 DC_D15 5VD 3 3VD 3 3Vdsk Memory Connector 5Vdsk 5Vdsk 5Vdsk 5Vdsk DC_IS C1 0 1uF C4 0 1uF C3 0 1uF C2 0 1uF DC_D16 DC_D17 DC_D18 DC_D19 DC_D20 DC_D21 DC_D22 DC_D23 DC_D16 DC_D17 DC_D18 DC_D19 DC_D20 DC_D21 DC_D22 DC_D23 CLKSx CLKSx R2 49 9ohm CLKSx DC_A14 DC_A15 DC_A16 DC_A17 DC_A2 DC_A3 DC_A4 DC_A...

Page 12: ... 15 16 17 18 19 20 J10 W2 W3 5Vext 5Vdsk 3 3Vext 3 3Vdsk VA VA 5VA 5VA VA VA 5VA 5VA 1 2 3 4 5 6 JP3 1 2 3 4 5 6 JP4 VA VA 5VA 5VA VA VA 5VA 5VA 1 2 3 4 5 6 JP1 1 2 3 4 5 6 JP2 Tom Hendrick Tom Hendrick EDGE 6441282 B 2 2 B Amplifier Card Power Connections DAP EVM Power Connections Interface Card Digital Power Connections Interface Card Analog Power Connections Signal Conditioning In Out to EVM An...

Page 13: ...let by its title and literature number Updated documents can also be obtained through our website at www ti com Data Sheets Literature Number TMS320 Cross Platform Daughtercard Specification SPRA711 SN74CBT3257 4 Bit 1 Of 2 FET Multiplexer Demultiplexer SCDS017 SN74AHC1G04 Single Inverter Gate SCLS318 SN74AHC1G32 Single 2 Input Positive OR Gate SCLS317 Designing Modular EVMs for Data Acquisition P...

Page 14: ... temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such TI products or services might be or are used FCC Warning This evaluation ...

Page 15: ...ice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertis...

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