ADC32RF4x/RF80 Internally Generated Clocking
21
SLAU620A – April 2016 – Revised May 2016
Copyright © 2016, Texas Instruments Incorporated
ADC32RF45/RF80 EVM Quick Startup Guide
Figure 21. Example Capture From Channel A – 8x Decimation Mode
5
ADC32RF4x/RF80 Internally Generated Clocking
5.1
ADC32RFxx EVM LMX2582 (or LMX2592) Clocking
Set up the TSW14J56 and ADC32RF45/RF80 as before, with the following exceptions for internally
generated clocking.
1. Verify the clocking selection jumper JP3 is set to the INT position to select the clock to the ADC to be
generated on the EVM, either by the LMX2582 or the LMK04828. The default configuration for the
EVM is for the LMX2582 to be the clock source to the ADC while in internal clock mode. (To select the
LMK04828 as the ADC clock source, there are two AC coupling caps to unsolder and resolder in a
different position.) There need not be any input to the J5 external clock SMA. If the LMK04828 is to be
synchronized to the timebase of the signal generator used for the analog input, then connect the 10-
MHz sync signal from the signal generator to the LMK04828 reference input J7.
2. The procedure for loading the configuration files is as previously described: the LMK04828 is
configured first followed by the LMX2582, followed by the ADC32RFxx. There are individual cfg files
for many of the common frequencies that the EVM may be asked to support, all generated from the
122.88-MHz VCXO installed on the EVM. The configuration files used for the ADC32RF45 are slightly
different than those for the ADC32RF80, and they are not interchangeable. The clock rate from the
EVM to the TSW14J56 is different for the RF80 with DDC than it is for the RF45 5-sample mode, and
the SYSREF frequencies are different.
3. The configuration files for the LMX2582 cover a number of common frequencies, and these cfg files
are the same for ADC32RF45 or ADC32RF80.
4. After configuring the LMK04828, reset the ADC by way of SW1 and then configure the ADC.
5.2
ADC32RFxx EVM LMK04828 Clocking
Set up the TSW14J56 and ADC32RF45/RF80 as before, with the following exceptions for internally
generated clocking.
1. Verify the clocking selection jumper JP3 is set to the INT position to select the clock to the ADC to be
