4.1 Bypass Mode
The following steps show how to configure the ADC366xEVM in Bypass mode with external sample clock and
DCLKIN. These instructions show how to configure the ADC3663EVM, but apply to other EVM variants as well.
4.1.1 ADC35XXEVM GUI: Bypass Mode (2W) Configuration
The following steps for Bypass (No Decimation)mode also apply to ADC3662EVM, but requires modification to
the sample/DCLKIN clocks in accordance with the desired sample rate and bit resolution. For example, at 25
MSPS, the DCLKIN rate is 25 MHz x 4 = 100 MHz.
For different sampling rates and bit resolutions, see
for calculating the correct DCLKIN frequency for
the desired sample rate and bit resolution.
Table 4-1. 16-bit, Bypass Mode, Sample rate and DCLKIN examples (ADC3663EVM, ADC3662EVM).
Interface Mode
DCLKIN multiplier
Example Sample Clock
Required DCLKIN Frequency
2 Wire
4
65 MSPS
260 MHz
1 Wire
8
32 MSPS
256 MHz
1/2 Wire
16
10 MSPS
160 MHz
For this example, ensure that the sampling clock (J9) and DCLKIN (J7) are connected before launching the
ADC35XX EVM GUI. In this example, for the ADC3663EVM, the sampling clock is 65 MHz, and the DCLKIN is
292.5 MHz.
External ADC sampling clock source and DCLKIN source must be frequency locked. If this is not
performed, the captured data appears scrambled. If using the onboard clocking option, the sampling
clock and DCLKIN are frequency locked.
After launching the ADC35xx GUI perform the following steps:
• Under Resolution, select "16 bit".
• Under Mode, select "2 Wire".
• Ensure that "CDC Enable" is red (disabled).
• To calculate the DCLKIN frequency, enter "65" in the Fs(MHz) field, and click calculate. This is informational
only.
• Click "Configure" button.
ADC GUI Configuration
SBAU366 – JANUARY 2021
ADC366xEVM Evaluation Module
9
Copyright © 2021 Texas Instruments Incorporated
