PC
USB
USB
J1
J4
J5
USB Mini-B
Signal Generator
(Input Source)
Signal
Generator
(CLK Source)
CLK
J10
CHB
J8
CHA
J6
+5 V
J5
J12
TSW1400
J3
USB Mini-B
CHC
J11
CHD
J13
To A, B, C, D
Channels
BPF
BPF
Synchronized
Sources
+6 V
Basic Test Procedure
10
SLAU455B – August 2012 – Revised May 2016
Copyright © 2012–2016, Texas Instruments Incorporated
ADS58H4x (ADS58H40/ADS58H43) EVM
3
Basic Test Procedure
This section outlines the basic test procedure for testing the EVM.
3.1
Test Block Diagram
The test set-up for evaluation of the EVM with the TSW1400 Capture Card is shown in
. As seen
in this figure, the evaluation setup involves a clock from a high-quality signal generator and a sine wave
for the analog input from a high-quality signal generator. High-order, narrow-bandpass filters are usually
required on clock and input frequency to remove phase noise and harmonic content from the input sine
waves. If the two signal generators are not synchronized by an external reference signal to make the clock
and input frequency coherent, then the resulting FFT first needs a windowing function, such as Hanning or
Blackman-Harris, applied to the data.
Figure 8. ADS58H4x and TSW1400 Test Setup Block Diagram