IADJ
EN
CSN
LM3409HV
UVLO
V
IN
VCC
COFF
GND
CSP
C4
R6
PGATE
C7
R8
R7
DAP
VIN
LED+
R9
1
2
3
4
5
6
7
8
9
10
PWM2
C1
C2
5V
R4
C9
R3
R2
R1
D1
L1
Q3
Q2
C3
C5
GND2
LED-
GND
VADJ
R10
C6
R11
C8
R5
D2
1
2
3
5
6
7
14
13
12
10
9
8
J2
J1
1
3
EN
Q1
U1
Two Off-timers
for
Shunt FET dimming
R
OFF2
www.ti.com
Shunt FET Circuit Modification
Figure 5. Multiple off-timers for shunt FET dimming circuit
11
SNVA390D – May 2009 – Revised May 2013
AN-1953 LM3409HV Evaluation Board
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