Texas Instruments LP877451Q1EVM, User Manual

Page 1: ...M and software user interface LP87745 Q1 GUI By default LP877451Q1EVM has LP877451A1RXVRQ1 device OTP version 17 6 MHz Low noise use case BOM but this EVM can also be used to evaluate another OTP device from LP8774x Q1 product family CAUTION Hot surface Contact may cause burns Do not touch Table of Contents 1 Top View with Basic External Connections 2 2 Input Output Voltages and Load Current Requi...

Page 2: ...ure 1 1 shows the top view diagram of the EVM along with basic connections By default EVM is configured to power up through VBAT supply through onboard 12 V VIN to 3 3 V VOUT pre regulator EVM can also be powered through external 3 3 V supply or through USB port Please refer to Table 3 2 for the right jumper configuration for each power supply input VIN 3 3V 3V 4V Nega ve Posi ve VBAT 5V 20V Nega ...

Page 3: ...d output voltage for each regulator and their maximum load current requirements Refer LP87745 Q1 device data sheet for more information about device electrical characteristics and its features Table 2 1 Input and Output Voltages and Load Current Requirements Regulator Name Input Supply Voltage at PMIC Supply Pin Output Voltage Maximum Load Current BUCK1 3 1 V 3 5 V 1 8 V 3 A BUCK2 3 1 V 3 5 V 1 0 ...

Page 4: ...Jumper Connector Number Jumper Connector Name Configuration Description J3 VIO_SEL Pins 1 and 2 3 3 V supply generated from USB supply Pins 2 and 3 Default 3 3 V VIO supply generated from PMIC VIO_LDO J4 SDI_SPI Pins 1 and 2 Default Connects PMIC SDI_SPI signal to MCU SDO_SPI port directly Pins 2 and 3 Connects PMIC SDI_SPI signal to MCU SDO_SPI port through a level shifter series resistors need t...

Page 5: ...s PMIC CS_SPI signal to MCU CS_SPI port directly Pins 2 and 3 Connects PMIC CS_SPI signal to MCU CS_SPI port through a level shifter series resistors must be mounted if this option is used J14 WD_DIS Closed Default Pull down resistor in CS_SPI pin enabled which will disable Q A watchdog during the PMIC power up For this to be effective USB cable should not be connected to the EVM when the PMIC is ...

Page 6: ...available connectors on the EVM Table 3 3 Test Points on the EVM Connector Number Connector Name Description J2 USB_5V_S Test point to measure 5 V supply from USB cable J12 VOUT_VLDO Test point to measure VOUT_VLDO output J22 Load Module Connector Connector placeholder for PMICLOADBOARDEVM for doing load transient testing J23 Load Module Connector Connector placeholder for PMICLOADBOARDEVM for doi...

Page 7: ...ormation about configuring jumpers and using GUI 4 1 GUI Texas Instruments provides a simple to use LP87745 Q1 GUI tool to enable configure and evaluate the various features of the LP87745 Q1 device on the EVM Please refer to the GUI README md file in the GUI tool s Help View README md tab for a more detailed description of this tool The GUI will run on most PC platforms and requires a USB port fo...

Page 8: ... for write operation CRC can be disabled by writing CONFIG_CRC_EN 0h through Console window Options Show Console or GUI Register Map Page For example output voltages startup and shutdown delays and peak current limits can be changed for each buck converter Figure 4 2 GUI Configuration Page In the register map page shown in Figure 4 3 registers can be read or written to Getting Started www ti com 8...

Page 9: ...Figure 4 3 GUI Register Map Page www ti com Getting Started SNVU769 SEPTEMBER 2021 Submit Document Feedback LP877451Q1EVM Evaluation Module 9 Copyright 2021 Texas Instruments Incorporated ...

Page 10: ...ct watchdog window The MCU sends incorrect answer bytes The MCU returns correct answer bytes but in the incorrect sequence Window 2 Window 1 Three correct answer bytes must be provided in Window 1 and in the correct order x Answer 3 x Answer 2 x Answer 1 After the Window 1 time elapses Window 2 begins The MCU needs to write the answer bytes to the WD_ANSWER 7 0 bits The fourth answer byte Answer 0...

Page 11: ...87745Q1EVM 6 1 Schematic Diagram This section includes images of the EVM schematics and different layers of the layout Figure 6 1 PMIC Schematic www ti com Schematics Layout and BOM SNVU769 SEPTEMBER 2021 Submit Document Feedback LP877451Q1EVM Evaluation Module 11 Copyright 2021 Texas Instruments Incorporated ...

Page 12: ...Figure 6 2 Preregulator Schematic Schematics Layout and BOM www ti com 12 LP877451Q1EVM Evaluation Module SNVU769 SEPTEMBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 13: ...Figure 6 3 MCU Schematic www ti com Schematics Layout and BOM SNVU769 SEPTEMBER 2021 Submit Document Feedback LP877451Q1EVM Evaluation Module 13 Copyright 2021 Texas Instruments Incorporated ...

Page 14: ...t of Signal Layer 1 Layer 3 Figure 6 7 Layout of Signal Layer 2 Layer 4 Figure 6 8 Layout of Ground Layer 2 Layer 5 Figure 6 9 Layout of Bottom Layer Layer 6 Schematics Layout and BOM www ti com 14 LP877451Q1EVM Evaluation Module SNVU769 SEPTEMBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 15: ... 330 pF 50 V 10 X7R 0402 GRM155R71H331KA01D MuRata C21 C22 C23 3 CAP CERM 0 22 µF 16 V 10 X7R AEC Q200 Grade 1 0402 GCM155R71C224KE02D MuRata C29 C30 C31 C43 C44 C45 C46 C47 C48 C64 C65 C66 C85 C87 C89 15 Chip Multilayer Ceramic Capacitors for Automotive GCM188D70J106ME36D Murata C33 C34 C35 C37 C38 C39 C40 C41 C42 9 CAP CERM 22 µF 6 3 V 20 X7T AEC Q200 Grade 1 0805 CGA4J1X7T0J226M TDK C49 C50 C51...

Page 16: ...r 2 54mm 4x2 Gold TH TSW 104 08 L D Samtec J28 J30 J32 3 SMA Jack Straight 50 Ohm Gold TH SMA J P H ST TH1 Samtec J33 1 Receptacle 0 5mm USB TYPE C R A SMT 12401610E4 2A Amphenol Canada J34 1 Header Shrouded 1 27mm 5x2 Gold SMT FTSH 105 01 F DV K Samtec L1 L2 L4 3 240nH Shielded Thin Film Inductor 5A 23mOhm Max 0806 2016 Metric TFM201610ALMAR24MTAA TDK L3 1 Inductor Shielded Metal Composite 1 5 µH...

Page 17: ...0 0402 CRCW0402383KFKED Vishay Dale R60 1 RES 200 k 5 0 063 W AEC Q200 Grade 0 0402 CRCW0402200KJNED Vishay Dale R78 1 RES 255 k 1 0 1 W 0603 RC0603FR 07255KL Yageo R79 1 RES 0 51 1 0 25 W 0805 CRM0805 FX R510ELF Bourns R82 1 RES 1 00 k 1 0 1 W 0603 RC0603FR 071KL Yageo R84 1 RES 43 2 k 1 0 1 W AEC Q200 Grade 0 0603 CRCW060343K2FKEA Vishay Dale R85 1 RES 100 5 0 1 W AEC Q200 Grade 0 0603 CRCW06031...

Page 18: ...QRJRRQ1 Texas Instruments Y1 1 Crystal 25 MHz 8pF SMD CX3225CA25000D0HSSCC Kyocera C61 C62 C63 0 Chip Multilayer Ceramic Capacitors for Automotive GCM188D70J106ME36D Murata C101 0 CAP CERM 1000 pF 50 V 10 X7R 0603 C0603C102K5RACTU Kemet J22 J23 0 Receptacle 2 5mm 3x2 Gold SMT 6651712 1 TE Connectivity R3 R8 0 RES 20 0 k 1 0 1 W AEC Q200 Grade 0 0603 CRCW060320K0FKEA Vishay Dale R6 R12 R20 R61 R62 ...

Page 19: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Page 20: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Page 21: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Page 22: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Page 23: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Page 24: ...s are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you wi...