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7.14.1 EMAC Device-Specific Information
SM320C6455-EP
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008
Interface Modes
The EMAC module on the C6455 supports four interface modes: Media Independent Interface (MII),
Reduced Media Independent Interface (RMII), Gigabit Media Independent Interface (GMII), and Reduced
Gigabit Media Independent Interface (RGMII). The MII and GMII interface modes are defined in the IEEE
802.3-2002 standard.
The RGMII mode of the EMAC conforms to the Reduced Gigabit Media Independent Interface (RGMII)
Specification (version 2.0). The RGMII mode implements the same functionality as the GMII mode, but
with a reduced number of pins. Data and control information is transmitted and received using both edges
of the transmit and receive clocks (TXC and RXC).
Note:
The EMAC internally delays the transmit clock (TXC) with respect to the transmit data and control
pins. Therefore, the EMAC conforms to the RGMII-ID operation of the RGMII specification. However, the
EMAC does not delay the receive clock (RXC); this signal must be delayed with respect to the receive
data and control pins outside of the DSP.
The RMII mode of the EMAC conforms to the RMII Specification (revision 1.2), as written by the RMII
Consortium. As the name implies, the Reduced Media Independent Interface (RMII) mode is a reduced
pin count version of the MII mode.
Interface Mode Select
The EMAC uses the same pins for the MII, GMII, and RMII modes. Standalone pins are included for the
RGMII mode due to specific voltage requirements. Only one mode can be used at a time. The mode used
is selected at device reset based on the MACSEL[1:0] configuration pins (for more detailed information,
see
Section 3
,
Device Configuration
).
Table 7-70
shows which multiplexed pins are used in the MII, GMII,
and RMII modes on the EMAC. For a detailed description of these pin functions, see
Table 2-3
,
Terminal
Functions
.
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C64x+ Peripheral Information and Electrical Specifications
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