(
)
4
2
UVLO Ri sin g
ENH
4
R
R
V
V
R
-
+
=
´
UVLO Falling
2
4
ENL
V
R
1
R
V
-
æ
ö
=
-
´
ç
÷
ç
÷
è
ø
12
ssc
ss
C
I
t
=
´
System Overview
27
JAJU324B – March 2015 – Revised July 2017
翻訳版
—
最新の英語版資料
http://www-s.ti.com/sc/techlit/TIDU832
Copyright © 2015–2017, Texas Instruments Incorporated
EMI/EMC
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The LM46002 needs a bootstrap capacitor C
4
. The recommended bootstrap capacitor is 0.47
μ
F and rated
at 6.3 V or higher. The bootstrap capacitor must be a high quality ceramic type with X7R or X5R grade
dielectric for temperature stability.
The V
CC
pin is the output of an internal LDO for the LM46002. The input for this LDO comes from either
V
IN
or bias. To ensure stability of the part, place a minimum of a 2.2-
μ
F, 10-V capacitor from this pin to
ground.
For an output voltage of 3.3 V or higher, the BIAS pin can be connected to the output in order to increase
efficiency. This pin is an input for the V
CC
LDO. When BIAS is not connected, the input for the V
CC
LDO will
be internally connected into V
IN
. Because this is an LDO, the voltage differences between the input and
output will affect the efficiency of the LDO. If necessary, a capacitor with the value of 1
μ
F can be added
close to the BIAS pin as an input capacitor for the LDO.
The soft start capacitor (C
12
) determines the minimum amount of time it will take the output voltage to
reach its programmed value during start up. This also allows limiting the inrush current in the LM46002
(current require to charge the output capacitors to the programmed value). If this pin is left unconnected,
the soft start time is 4.1 ms typically. Longer soft start times can be set by an external soft start capacitor
per
.
(10)
with
•
C
12
equal the soft start capacitor value (
μ
F)
•
I
SSC
the soft start charging current (
μ
A)
•
t
SS
equals the desired soft start times
The I
SSC
current is 2.2
μ
A, defining a soft start time of 10 ms would equal a soft start capacitor of 0.022
μ
F.
The undervoltage lockout (UVLO) is adjusted using the external voltage divider network of R
2
and R
4
. R
2
is
connected between the VIN pin and the EN pin of the device. R
4
is connected between the EN pin and the
GND pin. The UVLO has two thresholds: one for power up when the input voltage is rising, and one for
power down or brown outs when the input voltage V
IN
is falling. Use
to determine the
V
UVLO-Falling
level.
(11)
The enable falling edge threshold (V
ENL
) for the LM46002 is 1.8 V. R
4
was chosen to 100 k to minimize
input current from the supply. If the desired VIN UVLO falling level is 10 V, the value of R
2
can be
calculated using
. That is equal to 455.6 k. R
2
was chosen to be 453 k.
(12)
The enable rising edge threshold (V
ENH
) for the LM46002 is 2.1 V.
can be used to calculate the
required input voltage to meet the rising threshold to enable the converter. With the above chosen
resistors, the LM46002 will enable at 11.6 V.
