Texas Instruments TLIN2029-Q1, User Manual

Page 1: ...spacer Contents 1 Introduction 2 1 1 Features 2 2 Hardware description 3 2 1 Power 4 2 2 CAN 7 2 3 LIN 8 2 4 MCU interface SPI GPIO 9 3 Firmware 14 3 1 CAN CAN FD Controller Configuration 14 3 2 Sending and Receiving CAN Messages 16 3 3 Performance Optimization 17 3 4 Microcontroller Abstraction 18 4 Board Layout 22 5 Schematic and Bill of Materials 23 5 1 Schematic 23 5 2 Bill of Materials 25 Lis...

Page 2: ...sterPack explaining the board hardware details functions and locations of jumpers and connectors 1 1 Features Operates from a batter voltage input VBAT 6 V to 24 V Polarity protected and EMC filtered to create VSUP supply rail TCAN4550 Q1 CAN FD controller with integrated transceiver Supports Classical and CAN FD applications SPI interface Crystal oscillator 40 MHz Reset from push button switch MC...

Page 3: ...re description 3 SLLU216 July 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated SPI to CAN FD SBC LIN Transceiver BoosterPack User s Guide 2 Hardware description Figure 1 BOOSTXL CANFN LIN ...

Page 4: ...nd cannot be powered exclusively through the 3 3 V and 5 V supplies of the LaunchPad CAN and LIN transceivers are commonly found in automotive applications and operate across a wide recommended supply voltage range corresponding to a vehicle battery This supply voltage is used directly by the transceivers and converted down on the board to supply the digital voltage for the lower voltage digital d...

Page 5: ...s well as the oscillator block supporting the crystal oscillator or CLKIN pins 2 1 2 3 VCCOUT Pin The TCAN4550 Q1 devices provide up to 70 mA of current on the VCCOUT pin from the 5 V internal LDO without impacting the CAN transceiver performance except when in sleep mode and when the regulator is disabled This voltage can be used to power an MCU or other supporting circuitry that is not needed du...

Page 6: ... is placed into Sleep Mode When a valid wake up request is seen by the TCAN4550 Q1 either through a Wake Up Packet WUP on the CAN bus or through a state change on the WAKE pin the TCAN4550 Q1 transitions to Standby Mode and drive the Inhibit pin high re enabling the LDO output 3 3 V and 5 V output channels which in turn sources power to MCU on the LaunchPad CAUTION The BoosterPack s 3 3 V and 5 V ...

Page 7: ...VS diode footprint has been added to the BoosterPack and diodes installed to provide maximum protection when used in environments that may not have proper ESD controls However the use of these external diodes are considered optional and the TCAN4550 Q1 contains robust internal ESD protection 2 2 4 Termination The CAN standard requires termination of the CAN bus at each end with 120 Ω of resistance...

Page 8: ...ures of the BoosterPack To add a choke to the BoosterPack simply remove resistors R10 and R15 from the BoosterPack and install the choke in their place 2 2 6 Clocking The TCAN4550 Q1 requires either a crystal oscillator or a single ended clock to run its digital core A 40 MHz crystal oscillator is installed and connected to the OSC1 CLKIN and OSC2 pins by default and is available whenever the VIO ...

Page 9: ...lity to evaluate TI s TLINx02x Q1 family of the single channel LIN transceivers The BoosterPack allows both master and slave mode applications to be evaluated through the use of a single jumper J3 that connects or disconnects the external 1 kΩ pullup resistor and series diode required in master mode from the LIN bus To configure the BoosterPack for master mode place a shunt on J3 to connect the ex...

Page 10: ...LQ Hardware description www ti com 10 SLLU216 July 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated SPI to CAN FD SBC LIN Transceiver BoosterPack User s Guide Figure 5 MCU interface components and features 2 4 1 BoosterPack Pinout Figure 6 Pinout The BoosterPack kit adheres to the 40 pin LaunchPad and BoosterPack pinout standard This standard was created to aid comp...

Page 11: ...nCS pin by default If there is a conflict with this pin the other supported chip select pin can be used by removing the 0 Ω resistor R21 and installing it on R57 instead These pins are labeled on the BoosterPack nCS_0 and nCS_1 next to pins 12 and 13 of the LaunchPad board to board headers NOTE The Chip Select signal must transition back to a high following the end of the data transaction and cann...

Page 12: ... logical OR of all faults in registers 16 h0820 and 16 h0824 that are not masked Pin 31 of the LaunchPad connection header is connected to the nINT pin Furthermore since nINT is an interrupt status pin an LED has also been added to this pin as a visual indicator to the user on the status of this pin and buffered through a transistor to prevent excessive loading on the device pin However since the ...

Page 13: ... bit is saved for all modes of operation and is not reset in sleep mode As some external regulators or power management chips may need a digital logic pin for a wake up request this can be used NOTE This pin is active low and is the logical OR of CANINT LWU and WKERR register 16 h0820 that are not masked If a pull up resistor is placed on this pin it must be configured for power from the VIO rail ...

Page 14: ...ftware user s guide 3 1 CAN CAN FD Controller Configuration The CAN controller is a state machine that manages protocol specific details leaving the microcontroller to focus on managing the data being transmitted and received These details must be setup during initialization of the TCAN4550 Q1 following every power cycle and reset event Several of these settings are critical to proper communicatio...

Page 15: ...q per bit The four segments of the bit could then be defined with 1 tq for the sync_seg 3 tq for the prop_seg 4 tq for prop_seg1 and 2 tq for prop_seg2 This would place the sample point at 80 of the bit period allowing enough time for the signal to propagate through the bus There must be an integer multiple of tq per bit period and therefore these settings must be adjusted for the desired data rat...

Page 16: ...efore the transmission request can be made to the TCAN4550 Q1 by the microcontroller to start the transmission The controller then tries to send the messages on the bus at the first available opportunity given the arbitration rules and message identifier priority level as compared with the other messages being transmitted from other nodes at that moment 3 2 Sending and Receiving CAN Messages In or...

Page 17: ... tells the microcontroller how many new messages are in the FIFO and what index to start reading at The buffer requires the microcontroller to read the New Message Register which tells the microcontroller which buffers have unread messages in them At the end of each read the microcontroller must let the TCAN4550 Q1 know that the message has been received in order to release the element for reuse I...

Page 18: ...ler Abstraction The BoosterPack was designed to support operation with any microcontroller launchpad with a SPI bus Creating abstraction layers in the code simplifies the effort of porting the code to a different microcontrollers and allowing maximum amount of reuse at a system level AutoSAR Automotive Open Systems Architecture is a partnership of automotive interested parties that have worked tow...

Page 19: ...or receiving a CAN message 3 The Application Layer is the end user s code which calls upon the API to communicate with the TCAN4550 Q1 easily without much overhead Figure 10 Microcontroller Abstraction This Microcontroller Abstraction source code is developed for a MSP430FR6989 and is functional with the MSP EXP430FR6989 LaunchPad The code can be used with other microcontrollers and processors by ...

Page 20: ...the actual data transfer to make it easier to put into a loop to handle each word of reading and writing The END function pulls the CS pin high to signal to the TCAN4550 Q1 that the SPI transaction is complete Figure 11 32 bit SPI read or write example In Figure 11 a single 32 bit 1 word SPI read or write example is shown The first word contains the SPI header which tells the TCAN4550 Q1 what acti...

Page 21: ...ion Feedback Copyright 2019 Texas Instruments Incorporated SPI to CAN FD SBC LIN Transceiver BoosterPack User s Guide Figure 13 Multi word SPI packet example Figure 13 shows a 2 word SPI transfer example and how the READ WRITE function is called twice to do each individual word transfer This is helpful for cutting down on the SPI overhead when transferring a CAN message to or from the TCAN4550 Q1 ...

Page 22: ...9 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated SPI to CAN FD SBC LIN Transceiver BoosterPack User s Guide 4 Board Layout Figure 14 and Figure 15 show the top and bottom of the BoosterPack Figure 14 BoosterPack Top ...

Page 23: ... Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated SPI to CAN FD SBC LIN Transceiver BoosterPack User s Guide Figure 15 BoosterPack Bottom 5 Schematic and Bill of Materials 5 1 Schematic Figure 16 is a schematic diagram of the BoosterPack ...

Page 24: ...EXT VSUP 1µF C32 1 50k R43 1µF C30 1 50k R37 10µF C22 1uF C23 0 1uF C24 5V0 3V3 5V0 0 1uF C12 SPI_CS_0 SPI_MOSI SPI_MISO 1 2 J11 2 1 S1 3 30k R13 0 1uF C13 5V0 VSUP 5V0 D10 2 1 S2 1 2 3 J15 100pF C16 100pF C18 5V0 10 0k R8 3V3 7 2 1 6 Q2A 5 4 3 8 Q2B 10 0k R27 5V0 D4 VCCOUT 1 2 3 J1 TP4 TP3 SPI_CLK CAN_GPIO1 D5 0 R17 0 R20 0 R1 1 00M R15 4 99k R4 4 99k R18 10 0k R3 10 0k R19 10 0k R2 TLIN_RXD TLIN...

Page 25: ...402 CC0402DRNPO9BN8R0 Yageo C15 1 0 01uF CAP CERM 0 01 uF 100 V 5 X7R 1206 1206 12061C103JAT2A AVX C16 C18 2 100pF CAP CERM 100 pF 50 V 5 C0G NP0 0603 0603 06035A101JAT2A AVX C19 1 0 33uF CAP CERM 0 33 uF 16 V 10 X7R 0603 0603 C0603C334K4RACTU Kemet C21 1 10uF CAP CERM 10 uF 16 V 10 X7R 0805 0805 CL21B106KOQNNNE Samsung Electro Mechanics C22 C27 2 10uF CAP CERM 10 µF 16 V 10 X7R 1206 1206 C1206C10...

Page 26: ...Texas Instruments R1 1 0 RES 0 1 0 5 W 0805 0805 5106 Keystone R2 R3 R5 R6 R8 R19 R23 R24 R26 R27 R29 R31 R32 R34 R38 R47 R62 17 10 0k RES 10 0 k 1 0 063 W 0402 0402 RC0402FR 0710KL Yageo America R4 R18 R33 3 4 99k RES 4 99 k 1 0 063 W 0402 0402 RC0402FR 074K99L Yageo America R7 1 1 00k RES 1 00 k 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW04021K00FKED Vishay Dale R9 R25 R45 3 100k RES 100 k 1 0 063...

Page 27: ...er with Dominant State Timeout D0008A SOIC 8 D0008A TLIN2029DQ1 Texas Instruments U2 1 CAN FD Controller with Integrated Transceiver RGY0020A VQFN 20 RGY0020A TCAN4550RGYRQ1 Texas Instruments U3 1 Dual Channel Antenna LDO With Current Sense PWP0016J TSSOP 16 PWP0016J TPS7B7702QPWPRQ1 Texas Instruments U4 1 Low Power 1 8 2 5 3 3 V Input 3 3 V CMOS Output Single Inverter Gate DCK0005A LARGE T R DCK0...

Page 28: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Page 29: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Page 30: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Page 31: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Page 32: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Page 33: ...se resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for...

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