SLOS289E − DECEMBER 1999 − REVISED SEPTEMBER 2006
16
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
APPLICATION INFORMATION
general PowerPAD design considerations (continued)
TJ = 150
°
C
4
3
2
0
−55 −40
−10
20 35
Maximum Power Dissipation − W
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
65
95
125
1
TA − Free-Air Temperature −
°
C
−25
5
50
80
110
3.5
2.5
1.0
0.5
DGN Package
Low-K Test PCB
θ
JA = 52.7
°
C/W
PDIP Package
Low-K Test PCB
θ
JA = 104
°
C/W
SOIC Package
Low-K Test PCB
θ
JA = 176
°
C/W
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 31. Maximum Power Dissipation vs Free-Air Temperature
The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent
power and output power. The designer should never forget about the quiescent heat generated within the
device, especially multi-amplifier devices. Because these devices have linear output stages (Class A-B), most
of the heat dissipation is at low output voltages with high output currents.
The other key factor when dealing with power dissipation is how the devices are mounted on the PCB. The
PowerPAD devices are extremely useful for heat dissipation. But, the device should always be soldered to a
copper plane to fully use the heat dissipation properties of the PowerPAD. The SOIC package, on the other
hand, is highly dependent on how it is mounted on the PCB. As more trace and copper area is placed around
the device,
θ
JA
decreases and the heat dissipation capability increases. The currents and voltages shown in
these graphs are for the total package. For the dual amplifier packages, the sum of the RMS output currents
and voltages should be used to choose the proper package.
