Indirect Addressing Mode
6-11
Addressing Modes
Table 6–1. Indirect Addressing Operands (Continued)
Option
Operand
Example
Increment by index amount,
adding with reverse carry
*BR0+
LT *BR0+ loads the temporary register
(TREG) with the content of the data
memory address referenced by the
current AR and then adds the content
of AR0 to the content of the current AR,
adding with reverse carry propagation.
Decrement by index amount,
subtracting with reverse carry
*BR0–
LT *BR0– loads the temporary register
(TREG) with the content of the data
memory address referenced by the
current AR and then subtracts the con-
tent of AR0 from the content of the cur-
rent AR, subtracting with bit reverse
carry propagation.
All increments or decrements are performed by the auxiliary register arithmetic
unit (ARAU) in the same cycle during which the instruction is being decoded
in the pipeline.
The bit-reversed indexed addressing allows efficient I/O operations by rese-
quencing the data points in a radix-2 FFT program. The direction of carry prop-
agation in the ARAU is reversed when the address is selected, and AR0 is add-
ed to or subtracted from the current auxiliary register. A typical use of this ad-
dressing mode requires that AR0 first be set to a value corresponding to half
of the array’s size, and that the current AR value be set to the base address
of the data (the first data point).
6.3.3
Next Auxiliary Register
In addition to updating the current auxiliary register, a number of instructions
can also specify the
next auxiliary register or next AR. This register will be the
current auxiliary register when the instruction execution is complete. The
instructions that allow you to specify the next auxiliary register load the ARP
with a new value. When the ARP is loaded with that value, the previous ARP
value is loaded into the auxiliary register pointer buffer (ARB). Example 6–6
illustrates the selection of a next auxiliary register, as well as other indirect ad-
dressing features discussed so far.
