Instruction Set Comparison Table
B-20
Syntax
Description
5x
2xx
2x
1x
LACT
dma
LACT {
ind} [, next ARP]
√
√
√
√
√
√
Load Accumulator With Shift Specified by T
Register
Left shift the contents of the addressed data-memory
location by the value specified in the 4 LSBs of the T
register; load the result into the accumulator. If a shift
is specified, left shift the value before loading it into the
accumulator. During shifting, low-order bits are zero
filled, and high-order bits are sign extended if SXM = 1.
LALK #
lk [, shift]
√
√
√
Load Accumulator Long Immediate With Shift
Load a 16-bit immediate value into the accumulator. If
a shift is specified, left shift the constant before loading
it into the accumulator. During shifting, low-order bits
are zero filled, and high-order bits are sign extended if
SXM = 1.
LAMM
dma
LAMM {
ind} [, next ARP]
√
√
Load Accumulator With Memory-Mapped
Register
Load the contents of the addressed memory-mapped
register into the low word of the accumulator. The 9
MSBs of the data-memory address are cleared,
regardless of the current value of DP or the 9 MSBs of
AR (ARP).
LAR
AR, dma
LAR
AR, {ind} [, next ARP]
LAR
AR, #k
LAR
AR, #lk
√
√
√
√
√
√
√
√
√
√
√
√
Load Auxiliary Register
TMS320C1x and TMS320C2x devices: Load the con-
tents of the addressed data-memory location into the
designated auxiliary register.
TMS320C25, TMS320C2xx, and TMS320C5x de-
vices: Load the contents of the addressed data-
memory location or an 8-bit or 16-bit immediate value
into the designated auxiliary register.
LARK
AR, 8-bit constant
√
√
√
√
Load Auxiliary Register Immediate Short
Load an 8-bit positive constant into the designated
auxiliary register.
LARP
1-bit constant
LARP
3-bit constant
√
√
√
√
Load Auxiliary Register Pointer
TMS320C1x devices: Load a 1-bit constant into the
auxiliary register pointer (specifying AR0 or AR1).
TMS320C2x, TMS320C2xx, and TMS320C5x de-
vices: Load a 3-bit constant into the auxiliary register
pointer (specifying AR0–AR7).
