F-10
G
general-purpose input/output pins:
Pins that can be used to accept input
signals and/or send output signals but are not linked to specific uses.
These pins are the input pin BIO, the output pin XF, and the input/output
pins IO0, IO1, IO2, and IO3. (IO0–IO3 are not available on the ’C209.)
global data space:
One of the four ’C2xx address spaces. The global data
space can be used to share data with other processors within a system
and can serve as additional data space. See also
local data space.
GREG:
Global memory allocation register.
A memory-mapped register
used for specifying the size of the global data memory. Addresses not
allocated by the GREG for global data memory are available for local
data memory.
H
hardware interrupt:
An interrupt triggered through physical connections
with on-chip peripherals or external devices.
HOLD:
An input signal that allows external devices to request control of the
external buses. If an external device drives the HOLD/INT1 pin low and
the CPU sends an acknowledgement at the HOLDA pin, the external de-
vice has control of the buses until it drives HOLD high or a nonmaskable
hardware interrupt is generated. If HOLD is not used, it should be pulled
high.
HOLDA:
HOLD acknowledge signal. An output signal sent to the HOLDA pin
by the CPU in acknowledgement of a properly initiated HOLD operation.
When HOLDA is low, the processor is in a holding state and the address,
data, and memory-control lines are available to external circuitry.
HOLD operation:
An operation on the ’C2xx that allows for direct memory
access of external memory and I/O devices. A HOLD operation is initi-
ated by a HOLD/INT1 interrupt. When the corresponding interrupt ser-
vice routine executes an IDLE instruction, the external buses enter the
high-impedance state and the HOLDA signal is asserted. The buses re-
turn to their normal state, and the HOLD operation is concluded, when
the processor exits the IDLE state.
I
IACK:
See
interrupt acknowledge signal (IACK).
Glossary
