Auxiliary Register Arithmetic Unit (ARAU)
3-12
3.4
Auxiliary Register Arithmetic Unit (ARAU)
The CPU also contains the auxiliary register arithmetic unit (ARAU), an arith-
metic unit independent of the central arithmetic logic unit (CALU). The main
function of the ARAU is to perform arithmetic operations on eight auxiliary reg-
isters (AR7 through AR0) in parallel with operations occurring in the CALU.
Figure 3–9 shows the ARAU and related logic.
Figure 3–9. ARAU and Related Logic
16
3
16
16
16
16
16
16
16
16
Data write bus (DWEB)
ARAU
ARB
3
8LSBs
3LSBs
Instruction register
MUX
Data read bus (DRDB)
MUX
ARP
AR0
AR1
AR2
AR3
AR4
AR5
AR6
AR7
16
16
3
Data-read address bus (DRAB)
Data-write address bus (DWAB)
16
