SPRA921
8
TMS320C6713 Digital Signal Processor Optimized for High Performance Multichannel Audio Systems
3.5
Cache Summary
The efficiency of the cache architecture makes the device simple to use. The cache is inherently
transparent to the user. Due to the level of associativity and the high cache hit rate, virtually no
optimization must be done to achieve high performance. Reduced time for optimization leads to
reduced development time, allowing functional systems to be up and running quickly. High
performance can be immediately achieved with the cache architecture, while a Harvard
architecture device with small internal memory requires much more time to achieve similar
performance. This is because optimizing an application on a small Harvard architecture requires
several iterations to tune the application to fit in the small, fixed internal memories.
4
McASP
4.1
McASP Overview
The McASP is a serial port optimized for the needs of multichannel audio applications. With two
McASP peripherals, the TMS320C6713 device is capable of supporting two completely
independent audio zones simultaneously.
Each McASP consists of a transmit and receive section. These sections can operate completely
independently with different data formats, separate master clocks, bit clocks, and frame syncs or
alternatively, the transmit and receive sections may be synchronized. Each McASP module also
includes a pool of 16 shift registers that may be configured to operate as either transmit data,
receive data, or general-purpose I/O (GPIO).
The transmit section of the McASP can transmit data in either a time-division-multiplexed (TDM)
synchronous serial format or in a digital audio interface (DIT) format where the bit stream is
encoded for S/PDIF, AES-3, IEC-60958, CP-430 transmission. The receive section of the
McASP supports the TDM synchronous serial format.
Each McASP can support one transmit data format (either a TDM format or DIT format) and one
receive format at a time. All transmit shift registers use the same format and all receive shift
registers use the same format. However, the transmit and receive formats need not be the
same.
The McASP has additional capability for flexible clock generation, and error detection/handling,
as well as error management.
4.2
TDM Synchronous Transfer Mode
The McASP supports a multichannel, time-division-multiplexed (TDM) synchronous transfer
mode for both transmit and receive. Within this transfer mode, a wide variety of serial data
formats are supported, including formats compatible with devices using the Inter-Integrated
Sound (IIS) protocol.
TDM synchronous transfer mode is typically used when communicating between integrated
circuits such as between a DSP and one or more ADC, DAC, CODEC, or S/PDIF receiver
devices. In multichannel applications, it is typical to find several devices operating synchronized
with each other. For example, to provide six analog outputs, three stereo DAC devices would be
driven with the same bit clock and frame sync, but each stereo DAC would use a different
McASP serial data pin carrying stereo data (2 TDM time slots, left and right).
