20
SLVSDC2B – FEBRUARY 2016 – REVISED AUGUST 2016
Product Folder Links:
Copyright © 2016, Texas Instruments Incorporated
Input-Output (I/O) Requirements and Characteristics (continued)
Recommended operating conditions; T
A
= –40°C to +105°C unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(1)
DEBUG_CTL1/2 do not have an internal pull-down resistance path.
SWDCL_RPU
Pull-up resistance
2.8
4
5.2
k
Ω
GPIO (GPIO0, GPIO2-8, DEBUG1, DEBUG_CTL1/2, MRESET, RESETZ, BUSPOWERZ)
GPIO_VIH
High-level input voltage
LDO_3V3 = 3.3 V
2
V
VDDDIO = 1.8 V
1.25
GPIO_VIL
Low-level input voltage
LDO_3V3 = 3.3 V
0.8
V
VDDIO = 1.8 V
0.63
GPIO_HYS
Input hysteresis voltage
LDO_3V3 = 3.3 V
0.2
V
VDDIO = 1.8 V
0.09
GPIO_ILKG
I/O leakage current
Pin is Hi-Z;
V
IN
= 0 V to VDD (VDDIO or
LDO_3V3)
–1
1
μ
A
GPIO_RPU
Pull-up resistance (GPIO0, GPIO2-8, DEBUG1,
MRESET, RESETZ, BUSPOWERZ)
Pull-up enabled
50
100
150
k
Ω
Pull-up resistance (DEBUG_CTL1/2)
2.5
5
7.5
GPIO_RPD
Pull-down resistance (GPIO0, GPIO2-8, DEBUG1,
MRESET, RESETZ, BUSPOWERZ)
(1)
Pull-down enabled
50
100
150
k
Ω
GPIO_DG
Digital input path de-glitch
20
ns
GPIO_VOH
GPIO output-high voltage
I
O
= –2 mA, LDO_3V3 = 3.3 V
2.9
V
I
O
= –2 mA, VDDIO = 1.8 V
1.35
GPIO_VOL
GPIO output-low voltage
I
O
= 2 mA, LDO_3V3 = 3.3 V
0.4
V
I
O
= 2 mA, VDDIO = 1.8 V
0.45
I2C_IRQZ
OD_VOL
Low-level output voltage
I
OL
= 2 mA
0.4
V
OD_LKG
Leakage current
Output is Hi-Z, V
IN
= 0 to LDO_3V3
–1
1
μ
A
SBU
SBU_VIH
High-level input voltage
LDO_3V3 = 3.3 V
2
V
SBU_VIL
Low-level input voltage
LDO_3V3 = 3.3 V
0.8
V
SBU_HYS
Input hysteresis voltage
LDO_3V3 = 3.3 V
0.2
V
7.20 I
2
C Slave Requirements and Characteristics
Recommended operating conditions; T
A
= –40°C to +105°C unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SDA AND SCL COMMON CHARACTERISTICS
ILEAK
Input leakage current
Voltage on Pin = LDO_3V3
-3
3
μ
A
VOL
SDA output low voltage
IOL = 3 mA, LDO_3V3 = 3.3 V
0.4
V
IOL = 3 mA, VDDIO = 1.8 V
0.36
IOL
SDA max output low current
VOL = 0.4 V
3
mA
VOL = 0.6 V
6
VIL
Input low signal
LDO_3V3 = 3.3 V
0.99
V
VDDIO = 1.8 V
0.54
VIH
Input high signal
LDO_3V3 = 3.3 V
2.31
V
VDDIO = 1.8 V
1.26
VHYS
Input Hysteresis
LDO_3V3 = 3.3 V
0.17
V
VDDIO = 1.8 V
0.09
TSP
I
2
C pulse width suppressed
50
ns
CI
Pin Capacitance
10
pF
SDA AND SCL STANDARD MODE CHARACTERISTICS
FSCL
I
2
C clock frequency
0
100
kHz
THIGH
I
2
C clock high time
4
μ
s
