21
SLVSDC2B – FEBRUARY 2016 – REVISED AUGUST 2016
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Copyright © 2016, Texas Instruments Incorporated
I
2
C Slave Requirements and Characteristics (continued)
Recommended operating conditions; T
A
= –40°C to +105°C unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TLOW
I
2
C clock low time
4.7
μ
s
TSUDAT
I
2
C serial data setup time
250
ns
THDDAT
I
2
C serial data hold time
0
ns
TVDDAT
I
2
C valid data time
SCL low to SDA output valid
3.4
μ
s
TVDACK
I
2
C valid data time of ACK condition
ACK signal from SCL low to SDA
(out) low
3.4
μ
s
TOCF
I
2
C output fall time
10-pF to 400-pF bus
250
ns
TBUF
I
2
C bus free time between stop and start
4.7
μ
s
TSTS
I
2
C start or repeated start-condition setup time
4.7
μ
s
TSTH
I
2
C start or repeated start-condition hold time
4
μ
s
TSPS
I
2
C stop condition setup time
4
μ
s
SDA AND SCL FAST MODE CHARACTERISTICS
FSCL
I
2
C clock frequency
0
400
kHz
THIGH
I
2
C clock high time
0.6
μ
s
TLOW
I
2
C clock low time
1.3
μ
s
TSUDAT
I
2
C serial data setup time
100
ns
THDDAT
I
2
C serial data hold time
0
ns
TVDDAT
I
2
C valid data time
SCL low to SDA output valid
0.9
μ
s
TVDACK
I
2
C valid data time of ACK condition
ACK signal from SCL low to SDA
(out) low
0.9
μ
s
TOCF
I
2
C output fall time
10-pF to 400-pF bus, VDD = 3.3 V
12
250
ns
10-pF to 400-pF bus, VDD = 1.8 V
6.5
250
TBUF
I
2
C bus free time between stop and start
1.3
μ
s
TSTS
I
2
C start or repeated start-condition setup time
0.6
μ
s
TSTH
I
2
C start or repeated start-condition hold time
0.6
μ
s
TSPS
I
2
C stop condition setup time
0.6
μ
s
7.21 SPI Master Characteristics
Recommended operating conditions; T
A
= –40°C to +105°C unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FSPI
Frequency of SPI_CLK
11.82
12
12.18
MHz
TPER
Period of SPI_CLK (1/F_SPI)
82.1
83.33
84.6
ns
TWHI
SPI_CLK high width
30
ns
TWLO
SPI_CLK low width
30
ns
TDACT
SPI_SZZ falling to SPI_CLK rising delay time
30
50
ns
TDINACT
SPI_CLK falling to SPI_SSZ rising delay time
160
180
ns
TDMOSI
SPI_CLK falling to SPI_MOSI Valid delay time
–5
5
ns
TSUMISO
SPI_MISO valid to SPI_CLK falling setup time
21
ns
THDMSIO
SPI_CLK falling to SPI_MISO invalid hold time
0
ns
TRSPI
SPI_SSZ/CLK/MOSI rise time
10% to 90%, C
L
= 5 pF to 50 pF,
LDO_3V3 = 3.3 V
0.1
8
ns
TFSPI
SPI_SSZ/CLK/MOSI fall time
90% to 10%, C
L
= 5 pF to 50 pF,
LDO_3V3 = 3.3 V
0.1
8
ns
