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2 Test Setup

VCC is supplied with external power; 3.3 V or 5 V is recommended. The GND header pins are the ground
connection for the TRS3221RGTEVM. The DB9 connector mates with a personal computer's RS-232 port or a
USB to RS-232 adapter. For initial testing, external wires can be added. The ideal usage involves connecting the
terminal block data and control lines to a system that has an UART (Universal asynchronous receiver/
transmitter) onboard.

2.1 Overview and Basic Operation Settings

Transceiver V

CC

 power supply (pin 16 of J2) and GND (pin 15 of J2)

: The basic setup of the

TRS3221RGTEVM uses a single 3.3-V or 5-V power supply to evaluate the transceiver’s performance. To power
the transceiver, connect the 3.3-V or 5-V Vcc supply to pin 16 of J2 and GND to pin 15 of J2. The power supplied
should meet the required specification of VCC for the transceiver being tested.

The capacitors installed on the TRS3232RGTEVM were selected for V

CC

 = 3.3-V operation. It is required to

change some of the onboard capacitors for 5-V testing (

Table 2-1

).

Table 2-1. Capacitor configuration

C1

C2

C3

C4

3.3V

100nF

100nF

100nF

100nF

5.0V

47nF

330nF

330nF

330nF

(optional) Charge pump output (V+ and V-)

: TRS3221RGT has an internal charge pump circuit to generate

RS-232 signaling (Ref 1). Before starting the communication, the charge pump operation can be checked by
monitoring these two test points.

TIN input (pin 8 of J2)

: Connect the function generator to pin 8 of the J2 header on the board. Set the function

generator to generate a square wave of a certain frequency, 50% duty cycle, the low voltage level to 0 V, and the
high level to 5-V. This clock signal simulates the TTL data from MCU. Alternatively PRBS data from a signal
generator can be transmitted. Please note the data rate is not recommended to be faster than the specification
in the datasheet.

DOUT output (pin 2 of J1)

: Connect an oscilloscope probe to pin 2 of J1 on the board. Setup the oscilloscope

for proper time and voltage per division. Allow room to show three periods of bit-long waveform on the
oscilloscope. The received RS-232 signal should match the transmitted logic data. This indicates that the driver
of TRS3221RGT is operating correctly.

(optional) Loopback

: Connect pin 3 of J1 to pin 2 of J1. By shorting these two pins, the transmitted RS-232

signal is looped back to the receiver of TRS3232RGT. Connect an oscilloscope probe to pin 6 of J2 on the
board. Setup the oscilloscope for proper time and voltage per division. Allow room to show three periods of bit-
long waveform on the oscilloscope. The received TTL signal should match the loopback data. This indicates that
the receiver of TRS3221RGT is operating correctly.

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Test Setup

SLLU328 – DECEMBER 2020

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TRS3221 EVM User's Guide

3

Copyright © 2020 Texas Instruments Incorporated

Summary of Contents for TRS3221RGTEVM

Page 1: ...of Contents 1 Introduction 2 Features 2 Applications 2 Description 2 2 Test Setup 3 2 1 Overview and Basic Operation Settings 3 3 Schematic and Layout 4 3 1 Schematic 4 3 2 Layout 6 3 3 Bill of Materi...

Page 2: ...Equipment Description The TRS3221RGTEVM is an evaluation module for the TRS3221RGT and TRSF3221RGT devices normal and high speed RS 232 transceivers The module enables device evaluation using the inst...

Page 3: ...ge pump operation can be checked by monitoring these two test points TIN input pin 8 of J2 Connect the function generator to pin 8 of the J2 header on the board Set the function generator to generate...

Page 4: ...TEVM Schematic Table 3 1 Jumpers and Test Points Connection Type Description J1 9 pin connector Female DB9 connector to connect to PC J2 16 pin jumper Used for supply and TTL signal V Test point Charg...

Page 5: ...6 of transceiver 7 GND Ground 8 Input RX2 pin 8 of transceiver 9 GND Ground 10 Input OFF pin 13 of transceiver 11 GND Ground 12 Input EN pin 14 of transceiver 13 GND Ground 14 Power Vcc 15 GND Ground...

Page 6: ...ion Table INPUTS 1 OUTPUT RECEIVER STATUS RIN EN VALID RIN RS 232 LEVEL ROUT X H X Z Output off L L X H Normal operation H L X L Open L No H 1 H high level L low level X irrelevant Z high impedance of...

Page 7: ...Sullins Connector Solutions R1 R2 R3 R4 R8 5 10 0k RES 10 0 k 1 0 1 W 0402 0402 ERJ 2RKF1002X Panasonic R5 R6 R7 3 0 RES 0 5 0 1 W AEC Q200 Grade 0 0402 0402 ERJ 2GE0R00X Panasonic U0 1 RS 232 Transce...

Page 8: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 9: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 10: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 11: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 12: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 13: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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